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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-04-07 22:32:35 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-04-07 22:32:35 +0000 |
commit | 76679d0c390efeb91f64d0be626ae4cfb2df93a6 (patch) | |
tree | a89d116e448e00f782ae1d9fdd3742f7264e728c /nuttx/configs/stm3220g-eval/ostest/defconfig | |
parent | bcb1a538de42c6ac901be52239a9e907734a9e0f (diff) | |
download | px4-nuttx-76679d0c390efeb91f64d0be626ae4cfb2df93a6.tar.gz px4-nuttx-76679d0c390efeb91f64d0be626ae4cfb2df93a6.tar.bz2 px4-nuttx-76679d0c390efeb91f64d0be626ae4cfb2df93a6.zip |
Updates the STM3220G-EVAL configurations
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4572 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/stm3220g-eval/ostest/defconfig')
-rw-r--r-- | nuttx/configs/stm3220g-eval/ostest/defconfig | 56 |
1 files changed, 51 insertions, 5 deletions
diff --git a/nuttx/configs/stm3220g-eval/ostest/defconfig b/nuttx/configs/stm3220g-eval/ostest/defconfig index d0dc2009d..28a16df52 100644 --- a/nuttx/configs/stm3220g-eval/ostest/defconfig +++ b/nuttx/configs/stm3220g-eval/ostest/defconfig @@ -1,7 +1,7 @@ ############################################################################ # configs/stm3220g-eval/ostest/defconfig # -# Copyright (C) 2011 Gregory Nutt. All rights reserved. +# Copyright (C) 2012 Gregory Nutt. All rights reserved. # Author: Gregory Nutt <gnutt@nuttx.org> # # Redistribution and use in source and binary forms, with or without @@ -94,6 +94,8 @@ CONFIG_ARCH_DMA=n # CONFIG_STM32_CODESOURCERYW=y CONFIG_STM32_CODESOURCERYL=n +CONFIG_STM32_ATOLLIC_LITE=n +CONFIG_STM32_ATOLLIC_PRO=n CONFIG_STM32_DEVKITARM=n CONFIG_STM32_RAISONANCE=n CONFIG_STM32_BUILDROOT=n @@ -116,6 +118,30 @@ CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n CONFIG_STM32_JTAG_SW_ENABLE=n # +# On-chip CCM SRAM configuration +# +# CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP. You would need +# to do this if DMA is enabled to prevent non-DMA-able CCM memory from +# being a part of the stack. +# +CONFIG_STM32_CCMEXCLUDE=y + +# +# On-board FSMC SRAM configuration +# +# CONFIG_STM32_FSMC - Required. See below +# CONFIG_MM_REGIONS - Required. Must be 2 or 3 (see above) +# +# CONFIG_STM32_FSMC_SRAM=y - Indicates that SRAM is available via the +# FSMC (as opposed to an LCD or FLASH). +# CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space +# CONFIG_HEAP2_END - The end (+1) of the SRAM in the FSMC address space +# +CONFIG_STM32_FSMC_SRAM=y +CONFIG_HEAP2_BASE=0x64000000 +CONFIG_HEAP2_END=(0x64000000+(2*1024*1024)) + +# # Individual subsystems can be enabled: # # Individual subsystems can be enabled: @@ -180,7 +206,7 @@ CONFIG_STM32_TIM11=n #CONFIG_STM32_FORCEPOWER=y # -# STM3220xxx specific serial device driver settings +# STM32F20xxx specific serial device driver settings # # CONFIG_USARTn_SERIAL_CONSOLE - selects the USARTn for the # console and ttys0 (default is the USART1). @@ -305,6 +331,9 @@ CONFIG_CAN2_BAUD=700000 # defined. This provides the value of the mode bits indicating full duplex mode. # CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported # but some hooks are indicated with this condition. +# CONFIG_STM32_ETHMAC_REGDEBUG - If CONFIG_DEBUG is also enabled, this will +# generate far more debug output than you could ever care to see unless you +# are debugging low-level Ethernet driver features. # CONFIG_STM32_PHYADDR=0x01 CONFIG_STM32_MII=y @@ -320,6 +349,7 @@ CONFIG_STM32_PHYSR_100MBPS=0x0000 CONFIG_STM32_PHYSR_MODE=0x0004 CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004 CONFIG_STM32_ETH_PTP=n +CONFIG_STM32_ETHMAC_REGDEBUG=n # # I2C configuration @@ -360,7 +390,10 @@ CONFIG_HAVE_LIBM=n # CONFIG_DEBUG_VERBOSE - enables verbose debug output # CONFIG_DEBUG_SYMBOLS - build without optimization and with # debug symbols (needed for use with a debugger). -# CONFIG_HAVE_CXX - Enable support for C++S +# CONFIG_HAVE_CXX - Enable support for C++ +# CONFIG_HAVE_CXXINITIALIZE - The platform-specific logic includes support +# for initialization of static C++ instances for this architecture +# and for the selected toolchain (via up_cxxinitialize()). # CONFIG_MM_REGIONS - If the architecture includes multiple # regions of memory to allocate from, this specifies the # number of memory regions that the memory manager must @@ -448,7 +481,8 @@ CONFIG_DEBUG=n CONFIG_DEBUG_VERBOSE=n CONFIG_DEBUG_SYMBOLS=n CONFIG_HAVE_CXX=n -CONFIG_MM_REGIONS=1 +CONFIG_HAVE_CXXINITIALIZE=n +CONFIG_MM_REGIONS=2 CONFIG_ARCH_LOWPUTC=y CONFIG_RR_INTERVAL=200 CONFIG_SCHED_INSTRUMENTATION=n @@ -675,16 +709,28 @@ CONFIG_FS_READAHEAD=n CONFIG_FS_WRITEBUFFER=n # -# SDIO-based MMC/SD driver +# STM32 SDIO-based MMC/SD driver # # CONFIG_SDIO_DMA # SDIO driver supports DMA +# CONFIG_SDIO_PRI - Select SDIO interrupt prority. Default: 128 +# CONFIG_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. +# Default: Medium +# CONFIG_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: +# 4-bit transfer mode. +# CONFIG_MMCSD_MULTIBLOCK_DISABLE - Use only the single block transfer method. +# This setting is used to work around buggy drivers that cannot handle +# multiple block transfers. # CONFIG_MMCSD_MMCSUPPORT # Enable support for MMC cards # CONFIG_MMCSD_HAVECARDDETECT # SDIO driver card detection is 100% accurate # CONFIG_SDIO_DMA=n +#CONFIG_SDIO_PRI=128 +#CONFIG_SDIO_DMAPRIO +#CONFIG_SDIO_WIDTH_D1_ONLY +CONFIG_MMCSD_MULTIBLOCK_DISABLE=y CONFIG_MMCSD_MMCSUPPORT=n CONFIG_MMCSD_HAVECARDDETECT=n |