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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-01-04 00:14:45 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-01-04 00:14:45 +0000 |
commit | 10b9a1fa0c8d68bb7f2c6fac7176669052831401 (patch) | |
tree | 7b8e16865ed3a998f215f9fc53a0db979b4f3b97 /nuttx/configs/sure-pic32mx/nsh/defconfig | |
parent | 6ab3a2a10626f28693ff0b7db7c41e5b9e760131 (diff) | |
download | px4-nuttx-10b9a1fa0c8d68bb7f2c6fac7176669052831401.tar.gz px4-nuttx-10b9a1fa0c8d68bb7f2c6fac7176669052831401.tar.bz2 px4-nuttx-10b9a1fa0c8d68bb7f2c6fac7176669052831401.zip |
Fix an issue for architectures where interrupt numbers and vector numbers do not match 1-to-1
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4258 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/sure-pic32mx/nsh/defconfig')
-rw-r--r-- | nuttx/configs/sure-pic32mx/nsh/defconfig | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/nuttx/configs/sure-pic32mx/nsh/defconfig b/nuttx/configs/sure-pic32mx/nsh/defconfig index 3f2d9edcb..518c75acd 100644 --- a/nuttx/configs/sure-pic32mx/nsh/defconfig +++ b/nuttx/configs/sure-pic32mx/nsh/defconfig @@ -55,6 +55,30 @@ # CONFIG_DRAM_SIZE - Describes the installed DRAM. # CONFIG_DRAM_START - The start address of DRAM (physical) # CONFIG_DRAM_END - Last address+1 of installed RAM +# CONFIG_ARCH_NOINTC - define if the architecture does not +# support an interrupt controller or otherwise cannot support +# APIs like up_enable_irq() and up_disable_irq(). +# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided +# to interfaces like irq_attach() and irq_detach are the same as IRQ +# numbers that are provied to IRQ management functions like +# up_enable_irq() and up_disable_irq(). But that is not true for all +# interrupt controller implementations. For example, the PIC32MX +# interrupt controller manages interrupt sources that have a many-to-one +# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ +# must defined so that the OS logic will know not to assume it can use +# a vector number to enable or disable interrupts. +# CONFIG_ARCH_NOINTC - define if the architecture does not +# support an interrupt controller or otherwise cannot support +# APIs like up_enable_irq() and up_disable_irq(). +# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided +# to interfaces like irq_attach() and irq_detach are the same as IRQ +# numbers that are provied to IRQ management functions like +# up_enable_irq() and up_disable_irq(). But that is not true for all +# interrupt controller implementations. For example, the PIC32MX +# interrupt controller manages interrupt sources that have a many-to-one +# relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ +# must defined so that the OS logic will know not to assume it can use +# a vector number to enable or disable interrupts. # CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt # stack. If defined, this symbol is the size of the interrupt @@ -80,6 +104,8 @@ CONFIG_BOARD_LOOPSPERMSEC=4275 CONFIG_DRAM_SIZE=(32*1024) CONFIG_DRAM_START=0xa0000000 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) +CONFIG_ARCH_NOINTC=n +CONFIG_ARCH_VECNOTIRQ=y CONFIG_ARCH_IRQPRIO=y CONFIG_ARCH_INTERRUPTSTACK=n CONFIG_ARCH_STACKDUMP=y |