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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2011-05-16 15:09:39 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2011-05-16 15:09:39 +0000
commit3119f7b909d6c8938ae92e45b1e92dc1bcba0c0b (patch)
treedaf7f588b941cdac94651ca15cc46364c56772f6 /nuttx/configs/vsn/src/spi.c
parentc91f7947992488ba67e82f4c56c94cd64d385ffc (diff)
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Add initial CC1101 wireless logic from Uros
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3617 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/vsn/src/spi.c')
-rw-r--r--nuttx/configs/vsn/src/spi.c22
1 files changed, 18 insertions, 4 deletions
diff --git a/nuttx/configs/vsn/src/spi.c b/nuttx/configs/vsn/src/spi.c
index a452197b7..f3be9f5bf 100644
--- a/nuttx/configs/vsn/src/spi.c
+++ b/nuttx/configs/vsn/src/spi.c
@@ -58,6 +58,7 @@
#include "chip.h"
#include "stm32_gpio.h"
#include "stm32_internal.h"
+#include "stm32_waste.h"
#include "vsn.h"
@@ -98,11 +99,13 @@ void weak_function stm32_spiinitialize(void)
* Configurations of SPI pins is performed in stm32_spi.c.
* Here, we only initialize chip select pins unique to the board architecture.
*/
+
+#ifdef CONFIG_STM32_SPI2
+ stm32_configgpio(GPIO_CC1101_CS);
+#endif
#ifdef CONFIG_STM32_SPI3
-
- // Configure the SPI-based FRAM CS GPIO
- stm32_configgpio(GPIO_FRAM_CS);
+ stm32_configgpio(GPIO_FRAM_CS);
#endif
}
@@ -147,7 +150,18 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
- spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+ spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+
+ if (devid == SPIDEV_WIRELESS) {
+
+ stm32_gpiowrite(GPIO_CC1101_CS, !selected);
+
+ /* Wait for MISO to go low, indicates that Quart has stabilized */
+ if (selected) {
+ while( stm32_gpioread(GPIO_SPI2_MISO) ) up_waste();
+ }
+
+ }
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)