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authorGregory Nutt <gnutt@nuttx.org>2014-07-12 11:24:14 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-07-12 11:24:14 -0600
commit1a455c873948d9611be2da6eb1c93ae06e31d7b8 (patch)
tree1cf0ed058a1c4eace0fedf84ccc42107bdf106a6 /nuttx/configs
parent3ed275bd9a40a427cf7de0802522129e859d0a74 (diff)
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SAMA5 LCDC: Back out the delay kludge. Increase the LCDC input clock from MCK to 2*MCK was sufficient for all timing instbility problems
Diffstat (limited to 'nuttx/configs')
-rw-r--r--nuttx/configs/sama5d4-ek/include/board.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/nuttx/configs/sama5d4-ek/include/board.h b/nuttx/configs/sama5d4-ek/include/board.h
index 2afad607e..ad8a33f93 100644
--- a/nuttx/configs/sama5d4-ek/include/board.h
+++ b/nuttx/configs/sama5d4-ek/include/board.h
@@ -203,19 +203,6 @@
#define BOARD_LCDC_PIXELCLOCK \
(BOARD_LCDC_HSPERIOD * BOARD_LCDC_VSPERIOD * BOARD_LCDC_FRAMERATE)
-/* This specifies a delay after enabling the LCDC. This was found
- * experimentally and is very much a kludge. I presume that a delay of a
- * couple of frame times allows some unstable clocking to synchronize before
- * we start thrashing the framebuffer? But I am not sure why this is
- * necessary and, in fact, is certainly not necessary in other LCDC
- * configurations. Perhaps the delay would not be necessary if timings were
- * more precise?
- *
- * Delays are in units of microseconds.
- */
-
-#define BOARD_LCDC_ENABLE_DELAY (50*1000)
-
/* Backlight prescaler value and PWM output polarity */
#define BOARD_LCDC_PWMPS LCDC_LCDCFG6_PWMPS_DIV1