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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-07-17 20:02:57 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-07-17 20:02:57 +0000
commit942e88ce3a1e8b5a5c58ba5578438b9df5a4b5c4 (patch)
tree3c08fae01ca644560902522b284bb5cd4f068498 /nuttx/configs
parent5da90b889758aac235acf8c1dff93e90ddfbfe7d (diff)
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Add logic to initialize the LPC43xx SPIFI device
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4949 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs')
-rw-r--r--nuttx/configs/lpc4330-xplorer/README.txt3
-rw-r--r--nuttx/configs/lpc4330-xplorer/include/board.h30
-rw-r--r--nuttx/configs/lpc4330-xplorer/nsh/defconfig3
-rw-r--r--nuttx/configs/lpc4330-xplorer/src/up_nsh.c68
-rwxr-xr-xnuttx/configs/lpcxpresso-lpc1768/README.txt32
5 files changed, 90 insertions, 46 deletions
diff --git a/nuttx/configs/lpc4330-xplorer/README.txt b/nuttx/configs/lpc4330-xplorer/README.txt
index 13805c0b1..68fe3f396 100644
--- a/nuttx/configs/lpc4330-xplorer/README.txt
+++ b/nuttx/configs/lpc4330-xplorer/README.txt
@@ -901,7 +901,8 @@ Where <subdir> is one of the following:
CONFIG_LPC32_CODEREDW=y : Code Red under Windows
This configuration has some special options that can be used to
- create a block device on the SPIFI FLASH:
+ create a block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y
+ must also be defined to enable SPIFI setup support:
CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI
device.
diff --git a/nuttx/configs/lpc4330-xplorer/include/board.h b/nuttx/configs/lpc4330-xplorer/include/board.h
index 6901b8d16..052c1a97f 100644
--- a/nuttx/configs/lpc4330-xplorer/include/board.h
+++ b/nuttx/configs/lpc4330-xplorer/include/board.h
@@ -151,6 +151,36 @@
#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY
+/* SPIFI clocking **********************************************************/
+/* The SPIFI will receive clocking from a divider per the settings provided
+ * in this file. The NuttX code will configure PLL1 as the input clock
+ * for the selected divider
+ */
+
+#if BOARD_FCLKOUT_FREQUENCY < 120000000
+# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */
+# undef BOARD_SPIFI_DIVA
+#else
+# undef BOARD_SPIFI_PLL1
+# define BOARD_SPIFI_DIVA 1 /* Use IDIVA */
+#endif
+
+#undef BOARD_SPIFI_DIVB
+#undef BOARD_SPIFI_DIVC
+#undef BOARD_SPIFI_DIVD
+#undef BOARD_SPIFI_DIVE
+
+/* We need to configure the divider so that its output is as close to 120MHz
+ * without exceeding that value.
+ */
+
+#if BOARD_FCLKOUT_FREQUENCY < 120000000
+# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */
+#else
+# define BOARD_SPIFI_DIVIDER (2) /* 204MHz / 2 = 102MHz */
+# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 2 = 102MHz */
+#endif
+
/* UART clocking ***********************************************************/
/* Configure all U[S]ARTs to use the XTAL input frequency */
diff --git a/nuttx/configs/lpc4330-xplorer/nsh/defconfig b/nuttx/configs/lpc4330-xplorer/nsh/defconfig
index 8ab5e33ac..de4d3ff09 100644
--- a/nuttx/configs/lpc4330-xplorer/nsh/defconfig
+++ b/nuttx/configs/lpc4330-xplorer/nsh/defconfig
@@ -659,7 +659,8 @@ CONFIG_MMCSD_HAVECARDDETECT=n
#
# This configuration has some special options that can be used to
-# create a block device on the SPIFI FLASH:
+# create a block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y
+# must also be defined to enable SPIFI setup support:
#
# CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI
# device.
diff --git a/nuttx/configs/lpc4330-xplorer/src/up_nsh.c b/nuttx/configs/lpc4330-xplorer/src/up_nsh.c
index c9284ab5b..032c133f0 100644
--- a/nuttx/configs/lpc4330-xplorer/src/up_nsh.c
+++ b/nuttx/configs/lpc4330-xplorer/src/up_nsh.c
@@ -44,39 +44,31 @@
#include <debug.h>
#include <errno.h>
-/* This should be removed someday when we are confident in SPIFI */
-
-#ifdef CONFIG_DEBUG_FS
-# include "up_arch.h"
-# include "chip/lpc43_cgu.h"
-# include "chip/lpc43_ccu.h"
-#endif
-
-#include "chip.h"
#include <nuttx/ramdisk.h>
-/****************************************************************************
- * Pre-Processor Definitions
- ****************************************************************************/
-/* USB Configuration ********************************************************/
-
-/* PORT and SLOT number probably depend on the board configuration */
+#include "chip.h"
-#ifdef CONFIG_ARCH_BOARD_LPC4330_XPLORER
-# define CONFIG_NSH_HAVEUSBDEV 1
-#else
-# error "Unrecognized board"
-# undef CONFIG_NSH_HAVEUSBDEV
-#endif
+#ifdef CONFIG_SPIFI_BLKDRVR
+# include "lpc43_spifi.h"
-/* Can't support USB features if USB is not enabled */
+ /* This should be removed someday when we are confident in SPIFI */
-#ifndef CONFIG_USBDEV
-# undef CONFIG_NSH_HAVEUSBDEV
+# ifdef CONFIG_DEBUG_FS
+# include "up_arch.h"
+# include "chip/lpc43_cgu.h"
+# include "chip/lpc43_ccu.h"
+# endif
#endif
+/****************************************************************************
+ * Pre-Processor Definitions
+ ****************************************************************************/
/* SPIFI Configuration ******************************************************/
-/* CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI device.
+/* This logic supports some special options that can be used to create a
+ * block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y must also
+ * be defined to enable SPIFI setup support:
+ *
+ * CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI device.
* CONFIG_SPIFI_DEVNO - SPIFI minor device number. The SPFI device will be
* at /dev/ramN, where N is the value of CONFIG_SPIFI_DEVNO. Default: 0.
* CONFIG_SPIFI_RDONLY - Create a read only device on SPIFI.
@@ -95,22 +87,31 @@
*/
#ifdef CONFIG_SPIFI_BLKDRVR
+
+# ifndef CONFIG_LPC43_SPIFI=n
+# error "SPIFI support is not enabled (CONFIG_LPC43_SPIFI)"
+# endif
+
# ifndef CONFIG_SPIFI_DEVNO
# define CONFIG_SPIFI_DEVNO 0
# endif
+
# ifndef CONFIG_SPIFI_OFFSET
# define CONFIG_SPIFI_OFFSET 0
# endif
+
# ifndef CONFIG_SPIFI_BLKSIZE
# define CONFIG_SPIFI_BLKSIZE 512
# endif
+
# ifndef CONFIG_SPIFI_NBLOCKS
# error "Need number of SPIFI blocks (CONFIG_SPIFI_NBLOCKS)"
# endif
-#endif
-#define SPIFI_BUFFER \
- (FAR uint8_t *)(LPC43_LOCSRAM_SPIFI_BASE + CONFIG_SPIFI_OFFSET)
+# define SPIFI_BUFFER \
+ (FAR uint8_t *)(LPC43_LOCSRAM_SPIFI_BASE + CONFIG_SPIFI_OFFSET)
+
+#endif
/* Debug ********************************************************************/
@@ -151,6 +152,17 @@
#ifdef CONFIG_SPIFI_BLKDRVR
static int nsh_spifi_initialize(void)
{
+ int ret;
+
+ /* Initialize the SPIFI interface */
+
+ ret = lpc43_spifi_initialize();
+ if (ret < 0)
+ {
+ fdbg("ERROR: lpc43_spifi_initialize failed: %d\n", ret);
+ return ret;
+ }
+
/* This should be removed someday when we are confident in SPIFI */
#ifdef CONFIG_DEBUG_FS
diff --git a/nuttx/configs/lpcxpresso-lpc1768/README.txt b/nuttx/configs/lpcxpresso-lpc1768/README.txt
index b0ead543f..5632d0e82 100755
--- a/nuttx/configs/lpcxpresso-lpc1768/README.txt
+++ b/nuttx/configs/lpcxpresso-lpc1768/README.txt
@@ -646,18 +646,18 @@ LPCXpresso Configuration Options
LPC17xx specific CAN device driver settings. These settings all
require CONFIG_CAN:
- CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
- Standard 11-bit IDs.
- CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
- CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
- CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
- (the CCLK frequency is divided by this number to get the CAN clock).
- Options = {1,2,4,6}. Default: 4.
- CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
- (the CCLK frequency is divided by this number to get the CAN clock).
- Options = {1,2,4,6}. Default: 4.
- CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
- CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
+ CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
+ Standard 11-bit IDs.
+ CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
+ CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
+ CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
+ (the CCLK frequency is divided by this number to get the CAN clock).
+ Options = {1,2,4,6}. Default: 4.
+ CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
+ (the CCLK frequency is divided by this number to get the CAN clock).
+ Options = {1,2,4,6}. Default: 4.
+ CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
+ CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
LPC17xx specific PHY/Ethernet device driver settings. These setting
also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
@@ -787,10 +787,10 @@ Where <subdir> is one of the following:
class driver at apps/examples/usbstorage. See apps/examples/README.txt
for more information.
- NOTE: At present, the value for the SD SPI frequency is too
- high and the SD will fail. Setting that frequency to 400000
- removes the problem. TODO: Tune this frequency to some optimal
- value.
+ NOTE: At present, the value for the SD SPI frequency is too
+ high and the SD will fail. Setting that frequency to 400000
+ removes the problem. TODO: Tune this frequency to some optimal
+ value.
Jumpers: J55 must be set to provide chip select PIO1_11 signal as
the SD slot chip select.