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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-08-10 22:42:46 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-08-10 22:42:46 +0000 |
| commit | cd2148566595547e7adb17e804fa494fb5bc7126 (patch) | |
| tree | 9f21f0c9f78be5db32da4ccaf0f931dfe15b8f16 /nuttx/configs | |
| parent | b1e0f7b0dc5b0a350eb1e198ac6c4a579318cba9 (diff) | |
| download | px4-nuttx-cd2148566595547e7adb17e804fa494fb5bc7126.tar.gz px4-nuttx-cd2148566595547e7adb17e804fa494fb5bc7126.tar.bz2 px4-nuttx-cd2148566595547e7adb17e804fa494fb5bc7126.zip | |
Drop STM32 F2/4 SDIO clock from 24 to 16 MHz. Seems to fix SD accesses on STM3240G-EVAL
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5020 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs')
| -rw-r--r-- | nuttx/configs/stm3220g-eval/include/board.h | 4 | ||||
| -rwxr-xr-x | nuttx/configs/stm3240g-eval/include/board.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/nuttx/configs/stm3220g-eval/include/board.h b/nuttx/configs/stm3220g-eval/include/board.h index be9bb886d..dc2f04b9e 100644 --- a/nuttx/configs/stm3220g-eval/include/board.h +++ b/nuttx/configs/stm3220g-eval/include/board.h @@ -185,12 +185,12 @@ # define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif -/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(0+2)= 24 MHz +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)= 16 MHz * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)= 12 MHz */ #ifdef CONFIG_SDIO_DMA -# define SDIO_SDXFR_CLKDIV (0 << SDIO_CLKCR_CLKDIV_SHIFT) +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) #else # define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif diff --git a/nuttx/configs/stm3240g-eval/include/board.h b/nuttx/configs/stm3240g-eval/include/board.h index a438dcc1b..658355263 100755 --- a/nuttx/configs/stm3240g-eval/include/board.h +++ b/nuttx/configs/stm3240g-eval/include/board.h @@ -182,12 +182,12 @@ # define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif -/* DMA ON: HSDIOCLK=48MHz, SDIO_CK=SDIOCLK/(0+2)=24 MHz +/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz * DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz */ #ifdef CONFIG_SDIO_DMA -# define SDIO_SDXFR_CLKDIV (0 << SDIO_CLKCR_CLKDIV_SHIFT) +# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT) #else # define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #endif |