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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-20 21:16:39 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-12-20 21:16:39 +0000 |
commit | aec8ecfdad3e58bdec86a767047b9a9fc445d188 (patch) | |
tree | 441f3edfe2b5ded39452b676baf971213cc631a7 /nuttx/drivers/mtd | |
parent | f7933f6762d9bd290270ed8f2fd9b21381d6a760 (diff) | |
download | px4-nuttx-aec8ecfdad3e58bdec86a767047b9a9fc445d188.tar.gz px4-nuttx-aec8ecfdad3e58bdec86a767047b9a9fc445d188.tar.bz2 px4-nuttx-aec8ecfdad3e58bdec86a767047b9a9fc445d188.zip |
Update M25P driver per feedback from Mohammed Elwakeel
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4207 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/drivers/mtd')
-rw-r--r-- | nuttx/drivers/mtd/m25px.c | 52 |
1 files changed, 39 insertions, 13 deletions
diff --git a/nuttx/drivers/mtd/m25px.c b/nuttx/drivers/mtd/m25px.c index 69962a7b6..cfdb1ea97 100644 --- a/nuttx/drivers/mtd/m25px.c +++ b/nuttx/drivers/mtd/m25px.c @@ -55,10 +55,28 @@ /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ +/* Configuration ********************************************************************/ +/* Per the data sheet, MP25P10 parts can be driven with either SPI mode 0 (CPOL=0 and + * CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices can + * operated in mode 0 or 1. So you may need to specify CONFIG_MP25P_SPIMODE to + * select the best mode for your device. If CONFIG_MP25P_SPIMODE is not defined, + * mode 0 will be used. + */ + +#ifndef CONFIG_MP25P_SPIMODE +# define CONFIG_MP25P_SPIMODE SPIDEV_MODE0 +#endif + +/* Various manufacturers may have produced the parts */ +#ifndef CONFIG_MP25P_MANUFACTURER +# define CONFIG_MP25P_MANUFACTURER 0x20 +#endif + +/* M25P Registers *******************************************************************/ /* Indentification register values */ -#define M25P_MANUFACTURER 0x20 +#define M25P_MANUFACTURER CONFIG_MP25P_MANUFACTURER #define M25P_MEMORY_TYPE 0x20 #define M25P_M25P1_CAPACITY 0x11 /* 1 M-bit */ #define M25P_M25P64_CAPACITY 0x17 /* 64 M-bit */ @@ -204,7 +222,7 @@ static void m25p_lock(FAR struct spi_dev_s *dev) * state. */ - SPI_SETMODE(dev, SPIDEV_MODE3); + SPI_SETMODE(dev, CONFIG_MP25P_SPIMODE); SPI_SETBITS(dev, 8); (void)SPI_SETFREQUENCY(dev, 20000000); } @@ -299,27 +317,35 @@ static void m25p_waitwritecomplete(struct m25p_dev_s *priv) { uint8_t status; - /* Select this FLASH part */ - - SPI_SELECT(priv->dev, SPIDEV_FLASH, true); - - /* Send "Read Status Register (RDSR)" command */ - - (void)SPI_SEND(priv->dev, M25P_RDSR); - /* Loop as long as the memory is busy with a write cycle */ do { + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Read Status Register (RDSR)" command */ + + (void)SPI_SEND(priv->dev, M25P_RDSR); + /* Send a dummy byte to generate the clock needed to shift out the status */ status = SPI_SEND(priv->dev, M25P_DUMMY); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + if ((status & M25P_SR_WIP) != 0) + { + m25p_unlock(priv->dev); + usleep(1000); + m25p_lock(priv->dev); + } } while ((status & M25P_SR_WIP) != 0); - /* Deselect the FLASH */ - - SPI_SELECT(priv->dev, SPIDEV_FLASH, false); fvdbg("Complete\n"); } |