Start data abort handler (not finished)

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2861 42af7a65-404d-4744-a932-0658087f49c3

2 files changed, 58 insertions, 3 deletions

diff --git a/nuttx/arch/arm/src/arm/up_dataabort.c b/nuttx/arch/arm/src/arm/up_dataabort.c
index 0344f9bcc..dde5abc67 100644
--- a/nuttx/arch/arm/src/arm/up_dataabort.c
+++ b/nuttx/arch/arm/src/arm/up_dataabort.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/arm/up_dataabort.c
  *
- *   Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -74,11 +74,60 @@
 
 /****************************************************************************
  * Name: up_dataabort
+ *
+ * Description:
+ *   This is the data abort exception handler. The ARM data abort exception
+ *   occurs when a memory fault is detected during a data transfer.
+ *
  ****************************************************************************/
 
 void up_dataabort(uint32_t *regs)
 {
-  lldbg("Data abort at 0x%x\n", regs[REG_PC]);
+  /* Save the saved processor context in current_regs where it can be accessed
+   * for register dumps and possibly context switching.
+   */
+
   current_regs = regs;
-  PANIC(OSERR_ERREXCEPTION);
+
+#ifdef CONFIG_PAGING
+  /* In the NuttX on-demand paging implementation, only the read-only, .text
+   * section is paged.  However, the ARM compiler generated PC-relative data
+   * fetches from within the .text sections.  Also, it is customary to locate
+   * read-only data (.rodata) within the same section as .text so that it
+   * does not require copying to RAM. Misses in either of these case should
+   * cause a data abort.
+   */
+
+#warning "Lots of missing logic"
+#if 0
+  /* Get the (virtual) address of instruction that caused the data abort.
+   * When the exception occurred, this address was provide in the lr register
+   * and this value was saved in the context save area as the PC at the
+   * REG_R15 index.
+   */
+ 
+  if (regs[REG_R15] >= CONFIG_PAGING_PAGEDBASE &&
+      regs[REG_R15] <  CONFIG_PAGING_PAGEDEND)
+    {
+      /* Call pg_miss() to schedule the page fill.  A consequences of this
+       * call are:
+       *
+       * (1) The currently executing task will be blocked and saved on
+       *     on the g_waitingforfill task list.
+       * (2) An interrupt-level context switch will occur so that when
+       *     this function returns, it will return to a different task,
+       *     most likely the page fill worker thread.
+       * (3) The page fill worker task has been signalled and should
+       *     execute immediately when we return from this exception.
+       */
+
+      pg_miss();
+    }
+  else
+#endif
+#endif
+    {
+      lldbg("Data abort at 0x%x\n", regs[REG_PC]);
+      PANIC(OSERR_ERREXCEPTION);
+    }
 }
diff --git a/nuttx/arch/arm/src/arm/up_prefetchabort.c b/nuttx/arch/arm/src/arm/up_prefetchabort.c
index 13d4f5a07..1e5f27930 100644
--- a/nuttx/arch/arm/src/arm/up_prefetchabort.c
+++ b/nuttx/arch/arm/src/arm/up_prefetchabort.c
@@ -91,6 +91,12 @@
 
 /****************************************************************************
  * Name: up_prefetchabort
+ *
+ * Description;
+ *   This is the prefetch abort exception handler. The ARM prefetch abort
+ *   exception occurs when a memory fault is detected during an an
+ *   instruction fetch.
+ *
  ****************************************************************************/
 
 void up_prefetchabort(uint32_t *regs)