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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-11-11 21:20:49 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-11-11 21:20:49 +0000 |
commit | 5c7e3957a2fc4331a084f952e69c577baa469e1c (patch) | |
tree | 6f2ec97109f9fecfa7713066e282fd5c7f500343 /nuttx | |
parent | e9ac96265d1c698a85579d63f90fe476ffbffcc1 (diff) | |
download | px4-nuttx-5c7e3957a2fc4331a084f952e69c577baa469e1c.tar.gz px4-nuttx-5c7e3957a2fc4331a084f952e69c577baa469e1c.tar.bz2 px4-nuttx-5c7e3957a2fc4331a084f952e69c577baa469e1c.zip |
Incremental progress on STM32 MMCSD driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2245 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx')
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_sdio.c | 174 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/stm32/stm32_sdio.h | 3 | ||||
-rw-r--r-- | nuttx/drivers/mmcsd/mmcsd_internal.h | 4 | ||||
-rw-r--r-- | nuttx/drivers/mmcsd/mmcsd_sdio.h | 71 | ||||
-rwxr-xr-x | nuttx/include/nuttx/sdio.h | 211 |
5 files changed, 454 insertions, 9 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_sdio.c b/nuttx/arch/arm/src/stm32/stm32_sdio.c index f860fc8d0..8d0985a71 100644 --- a/nuttx/arch/arm/src/stm32/stm32_sdio.c +++ b/nuttx/arch/arm/src/stm32/stm32_sdio.c @@ -55,6 +55,25 @@ * Pre-Processor Definitions ****************************************************************************/ +/* Friendly CLKCR bit re-definitions ****************************************/ +
+#define SDIO_CLKCR_RISINGEDGE (0)
+#define SDIO_CLKCR_FALLINGEDGE SDIO_CLKCR_NEGEDGE
+ +/* HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz */ +
+#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
+#define STM32_CLCKCR_INIT \ + (SDIO_INIT_CLKDIV|SDIO_CLKCR_RISINGEDGE|SDIO_CLKCR_WIDBUS_D1) + +/* HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz */ +
+#define SDIO_TRANSFER_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
+#define STM32_CLCKCR_TRANSFER \ + (SDIO_TRANSFER_CLKDIV|SDIO_CLKCR_RISINGEDGE|SDIO_CLKCR_WIDBUS_D1)
+#define STM32_CLKCR_WIDETRANSFER \ + (SDIO_TRANSFER_CLKDIV|SDIO_CLKCR_RISINGEDGE|SDIO_CLKCR_WIDBUS_D4)
+ /**************************************************************************** * Private Types ****************************************************************************/ @@ -66,12 +85,20 @@ struct stm32_dev_s struct sdio_dev_s dev; /* Standard, base MMC/SD interface */ /* STM32-specific extensions */ + + ubyte type; /* Card type (see MMCSD_CARDTYPE_ definitions) */ }; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ +/* Low-level helpers ********************************************************/ + +static inline void stm32_setclkcr(uint32 clkcr);
+static inline void stm32_enableint(uint32 bitset); +static inline void stm32_disableint(uint32 bitset); + /* SDIO interface methods ***************************************************/ /* Initialization/setup */ @@ -87,7 +114,7 @@ static int stm32_attach(FAR struct sdio_dev_s *dev); /* Command/Status/Data Transfer */ -static void stm32_sendcmd(FAR struct sdio_dev_s *dev, ubyte cmd, +static void stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 arg, FAR const ubyte *data); static int stm32_senddata(FAR struct sdio_dev_s *dev, FAR const ubyte *buffer); @@ -176,6 +203,91 @@ struct stm32_dev_s g_mmcsd = ****************************************************************************/ /**************************************************************************** + * Low-level Helpers + ****************************************************************************/ +/**************************************************************************** + * Name: stm32_setclkcr + * + * Description: + * Modify oft-changed bits in the CLKCR register. Only the following bit- + * fields are changed: + * + * CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, and HWFC_EN + * + * Input Parameters: + * clkcr - A new CLKCR setting for the above mentions bits (other bits + * are ignored. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static inline void stm32_setclkcr(uint32 clkcr)
+{
+ uint32 regval = getreg32(STM32_SDIO_CLKCR);
+
+ /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ +
+ regval &= ~(SDIO_CLKCR_CLKDIV_MASK|SDIO_CLKCR_PWRSAV|SDIO_CLKCR_BYPASS| + SDIO_CLKCR_WIDBUS_MASK|SDIO_CLKCR_NEGEDGE|SDIO_CLKCR_HWFC_EN); + + /* Replace with user provided settings */ + + clkcr &= (SDIO_CLKCR_CLKDIV_MASK|SDIO_CLKCR_PWRSAV|SDIO_CLKCR_BYPASS| + SDIO_CLKCR_WIDBUS_MASK|SDIO_CLKCR_NEGEDGE|SDIO_CLKCR_HWFC_EN); + regval |= clkcr; + putreg32(regval, STM32_SDIO_CLKCR); +}
+ +/**************************************************************************** + * Name: stm32_enableint + * + * Description: + * Enable SDIO interrupts + * + * Input Parameters: + * bitset - The set of bits in the SDIO MASK register to set + * + * Returned Value: + * None + * + ****************************************************************************/ + +static inline void stm32_enableint(uint32 bitset) +{ + uint32 regval; + regval = getreg32(STM32_SDIO_MASK); + regval |= bitset; + putreg32(regval, STM32_SDIO_MASK); +} +
+/**************************************************************************** + * Name: stm32_disableint + * + * Description: + * Disable SDIO interrupts + * + * Input Parameters: + * bitset - The set of bits in the SDIO MASK register to clear + * + * Returned Value: + * None + * + ****************************************************************************/ + +static inline void stm32_disableint(uint32 bitset) +{ + uint32 regval; + regval = getreg32(STM32_SDIO_MASK); + regval &= ~bitset; + putreg32(regval, STM32_SDIO_MASK); +} +
+/**************************************************************************** + * SDIO Interface Methods + ****************************************************************************/ +/**************************************************************************** * Name: stm32_reset * * Description: @@ -300,7 +412,7 @@ static int stm32_attach(FAR struct sdio_dev_s *dev) * * Input Parameters: * dev - An instance of the MMC/SD device interface - * cmd - The command to send + * cmd - The command to send (32-bits, encoded) * arg - 32-bit argument required with some commands * data - A reference to data required with some commands * @@ -309,9 +421,53 @@ static int stm32_attach(FAR struct sdio_dev_s *dev) * ****************************************************************************/ -static void stm32_sendcmd(FAR struct sdio_dev_s *dev, ubyte cmd, +static void stm32_sendcmd(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 arg, FAR const ubyte *data) { + uint32 regval; + uint32 cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
+ + /* Set the SDIO Argument value */
+ + putreg32(arg, STM32_SDIO_ARG); + + /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */
+ + regval = getreg32(STM32_SDIO_CMD);
+ regval &= ~(SDIO_CMD_CMDINDEX_MASK|SDIO_CMD_WAITRESP_MASK| + SDIO_CMD_WAITINT|SDIO_CMD_WAITPEND|SDIO_CMD_CPSMEN); + + /* Set WAITRESP bits */ +#warning VERIFY + switch ((cmd & MMCSD_RESPONSE_MASK) >> MMCSD_RESPONSE_SHIFT) + { + case MMCSD_NO_RESPONSE: + regval |= SDIO_CMD_NORESPONSE; + break; + + case MMCSD_R1_RESPONSE: + case MMCSD_R1B_RESPONSE: + case MMCSD_R3_RESPONSE: + case MMCSD_R4_RESPONSE: + case MMCSD_R5_RESPONSE: + case MMCSD_R6_RESPONSE: + case MMCSD_R7_RESPONSE: + regval |= SDIO_CMD_SHORTRESPONSE; + break; + + case MMCSD_R2_RESPONSE: + regval |= SDIO_CMD_LONGRESPONSE; + break; + } + + /* Set CPSMEN and the command index */ +
+ cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
+ regval |= cmdidx | SDIO_CMD_CPSMEN;
+
+ /* Write the SDIO CMD */
+
+ putreg32(regval, STM32_SDIO_CMD); } /**************************************************************************** @@ -618,7 +774,17 @@ static int stm32_dmastop(FAR struct sdio_dev_s *dev) #ifdef CONFIG_SDIO_DMA static int stm32_dmastatus(FAR struct sdio_dev_s *dev, size_t *remaining) { - return -ENOSYS; +#ifdef CONFIG_DEBUG + if (remaining) + { + *remaining = getreg32(STM32_SDIO_DCOUNT); + return OK; + } + return -EINVAL; +#else + *remaining = getreg32(STM32_SDIO_DCOUNT); + return OK; +#endif } #endif diff --git a/nuttx/arch/arm/src/stm32/stm32_sdio.h b/nuttx/arch/arm/src/stm32/stm32_sdio.h index 73a29d8cf..8111aa803 100755 --- a/nuttx/arch/arm/src/stm32/stm32_sdio.h +++ b/nuttx/arch/arm/src/stm32/stm32_sdio.h @@ -123,7 +123,7 @@ #define SDIO_CMD_CMDINDEX_MASK (0x3f << SDIO_CMD_CMDINDEX_SHIFT) #define SDIO_CMD_WAITRESP_SHIFT (6) /* Bits 7-6: Wait for response bits */ #define SDIO_CMD_WAITRESP_MASK (3 << SDIO_CMD_WAITRESP_SHIFT) -# define SDIO_CMD_NORESPONSE1 (0 << SDIO_CMD_WAITRESP_SHIFT) /* 00/10: No response */ +# define SDIO_CMD_NORESPONSE (0 << SDIO_CMD_WAITRESP_SHIFT) /* 00/10: No response */ # define SDIO_CMD_SHORTRESPONSE (1 << SDIO_CMD_WAITRESP_SHIFT) /* 01: Short response */ # define SDIO_CMD_LONGRESPONSE (3 << SDIO_CMD_WAITRESP_SHIFT) /* 11: Long response */ #define SDIO_CMD_WAITINT (1 << 8) /* Bit 8: CPSM waits for interrupt request */ @@ -217,6 +217,7 @@ #define SDIO_ICR_CEATAENDC (1 << 23) /* Bit 23: CEATAEND flag clear bit */ #define SDIO_ICR_RESET 0x00c007ff +#define SDIO_ICR_STATICFLAGS 0x000005ff
#define SDIO_MASK_CCRCFAILIE (1 << 0) /* Bit 0: Command CRC fail interrupt enable */ #define SDIO_MASK_DCRCFAILIE (1 << 1) /* Bit 1: Data CRC fail interrupt enable */ diff --git a/nuttx/drivers/mmcsd/mmcsd_internal.h b/nuttx/drivers/mmcsd/mmcsd_internal.h index 9d25a372a..a275a2822 100644 --- a/nuttx/drivers/mmcsd/mmcsd_internal.h +++ b/nuttx/drivers/mmcsd/mmcsd_internal.h @@ -61,8 +61,8 @@ #define MMCSD_CARDTYPE_UNKNOWN 0 /* Unknown card type */ #define MMCSD_CARDTYPE_MMC 1 /* Bit 0: MMC card */ #define MMCSD_CARDTYPE_SDV1 2 /* Bit 1: SD version 1.x */ -#define MMCSD_CARDTYPE_SDV2 4 /* Bit 1: SD version 2.x with byte addressing */ -#define MMCSD_CARDTYPE_BLOCK 8 /* Bit 2: SD version 2.x with block addressing */ +#define MMCSD_CARDTYPE_SDV2 4 /* Bit 2: SD version 2.x with byte addressing */ +#define MMCSD_CARDTYPE_BLOCK 8 /* Bit 3: SD version 2.x with block addressing */ #define IS_MMC(t) (((t) & MMCSD_CARDTYPE_MMC) != 0) #define IS_SD(t) (((t) & (MMCSD_CARDTYPE_SDV1|MMCSD_CARDTYPE_SDV2)) != 0) diff --git a/nuttx/drivers/mmcsd/mmcsd_sdio.h b/nuttx/drivers/mmcsd/mmcsd_sdio.h new file mode 100644 index 000000000..a4301d002 --- /dev/null +++ b/nuttx/drivers/mmcsd/mmcsd_sdio.h @@ -0,0 +1,71 @@ +/******************************************************************************************** + * drivers/mmcsd/mmcsd_sdio.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************************/ + +#ifndef __DRIVERS_MMCSD_MMCSD_SDIO_H +#define __DRIVERS_MMCSD_MMCSD_SDIO_H + +/******************************************************************************************** + * Included Files + ********************************************************************************************/ + +#include <nuttx/config.h> +#include <sys/types.h> + +/******************************************************************************************** + * Pre-Processor Definitions + ********************************************************************************************/ + +/******************************************************************************************** + * Public Types + ********************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/******************************************************************************************** + * Public Functions + ********************************************************************************************/ + + +#undef EXTERN +#if defined(__cplusplus) +} +#endif +#endif /* __DRIVERS_MMCSD_MMCSD_SDIO_H */ diff --git a/nuttx/include/nuttx/sdio.h b/nuttx/include/nuttx/sdio.h index 52205f79b..bacb1db70 100755 --- a/nuttx/include/nuttx/sdio.h +++ b/nuttx/include/nuttx/sdio.h @@ -60,6 +60,213 @@ #define SDIOEVENT_ALLEVENTS 0xff +/* Commands are bit-encoded to provide as much information to the SDIO driver as + * possible in 32-bits. The encoding is as follows: + * + * ---- ---- ---- ---- ---- --RR RRCC CCCC + * + * CCCCCC - Bits 0-5: 6-bit command index (Range 9-63) + * RRRR - Bits 6-9: 4-bit response code (R1, R1B, R2-5) + */ + +/* MMC, SD, SDIO Common Indices */ + +#define MMCSD_CMDIDX_SHIFT (0) +#define MMCSD_CMDIDX_MASK (0x3f << MMCSD_CMDIDX_SHIFT) +# define MMCSD_CMDIDX0 0 /* GO_IDLE_STATE: Resets all cards to idle state + * -Broadcast, no response */ +# define MMC_CMDIDX1 1 /* SEND_OP_COND: Sends capacity support information + * -Broadcast, R3 response, 31:0=OCR */ +# define MMCSD_CMDIDX2 2 /* ALL_SEND_CID + * -Broadcast, R2 response */ +# define MMC_CMDIDX3 3 /* SET_RELATIVE_ADDR + * -Addressed Command, R1 response 31:16=RCA */ +# define SD_CMDIDX3 3 /* SEND_RELATIVE_ADDR + * -Addressed Command, R6 response 31:16=RCA */ +# define MMCSD_CMDIDX4 4 /* SET_DSR + * -Broadcast command, no response 31:16=RCA */ +# define SDIO_CMDIDX5 5 /* SDIO_SEND_OP_COND + * -Addressed Command, R4 response 47:16=IO_OCR */ +# define MMCSD_CMDIDX6 6 /* HS_SWITCH: Checks switchable function */ +# define MMCSD_CMDIDX7 7 /* SELECT/DESELECT CARD + * -Addressed Command, R1 response 31:16=RCA */ +# define SD_CMDIDX8 8 /* IF_COND: Sends SD Memory Card interface condition + * R7 response */ +# define MMCSD_CMDIDX9 9 /* SEND_CSD: Asks card to send its card specific data (CSD) + * -Addressed Command, R2 response 31:16=RCA */ +# define MMCSD_CMDIDX10 10 /* SEND_CID: Asks card to send its card identification (CID) + * -Addressed Command, R2 response 31:16=RCA */ +# define MMC_CMDIDX11 11 /* READ_DAT_UNTIL_STOP + * -Addressed data transfer command, R1 response 31:0=DADR */ +# define MMCSD_CMDIDX12 12 /* STOP_TRANSMISSION: Forces the card to stop transmission + * -Addressed Command, R1b response */ +# define MMCSD_CMDIDX13 13 /* SEND_STATUS: Asks card to send its status register + * -Addressed Command, R1 response 31:16=RCA */ +# define MMCSD_CMDIDX14 14 /* HS_BUSTEST_READ: */ +# define MMCSD_CMDIDX15 15 /* GO_INACTIVE_STATE + * Addressed Command, Response 31:16=RCA */ +# define MMCSD_CMDIDX16 16 /* SET_BLOCKLEN: Sets a block length (in bytes) + * -Addressed Command, R1 response 31:0=BLEN */ +# define MMCSD_CMDIDX17 17 /* READ_SINGLE_BLOCK: Reads a block of the selected size + * -Addressed data transfer command, R1 response 31:0=DADR */ +# define MMCSD_CMDIDX18 18 /* READ_MULTIPLE_BLOCK: Continuously transfers blocks from card to host + * -Addressed data transfer command, R1 response 31:0=DADR */ +# define MMCSD_CMDIDX19 19 /* HS_BUSTEST_WRITE: */ +# define MMC_CMDIDX20 20 /* WRITE_DAT_UNTIL_STOP: (MMC) + * -Addressed data transfer command, R1 response 31:0=DADR R1 */ +# define MMC_CMDIDX23 23 /* SET_BLOCK_COUNT: (MMC) + * -Addressed data transfer command, R1 response 31:0=DADR */ +# define MMCSD_CMDIDX24 24 /* WRITE_BLOCK: Writes a block of the selected size + * -Addressed data transfer command, R1 response 31:0=DADR */ +# define MMCSD_CMDIDX25 25 /* WRITE_MULTIPLE_BLOCK: Continuously writes blocks of data + * -Addressed data transfer command, R1 response 31:0=DADR */ +# define MMCSD_CMDIDX26 26 /* PROGRAM_CID: (Manufacturers only) + * -Addressed data transfer command, R1 response */ +# define MMCSD_CMDIDX27 27 /* PROGRAM_CSD: Set programmable bits of the CSD + * -Addressed data transfer command, R1 response */ +# define MMCSD_CMDIDX28 28 /* SET_WRITE_PROT: Sets the write protection bit of group + * -Addressed Command, R1b response 31:0=DADR */ +# define MMCSD_CMDIDX29 29 /* CLR_WRITE_PROT: Clears the write protection bit of group + * -Addressed Command, R1b response 31:0=DADR */ +# define MMCSD_CMDIDX30 30 /* SEND_WRITE_PROT: Asks card to send state of write protection bits + * -Addressed data transfer command, R1 response 31:0=WADR */ +# define SD_CMDIDX32 32 /* ERASE_GRP_START: Sets address of first block to erase (SD) + * -Addressed Command, R1 response 31:0=DADR */ +# define SD_CMDIDX33 33 /* ERASE_GRP_END: Sets address of last block to erase (SD) + * -Addressed Command, R1 response 31:0=DADR */ +# define MMC_CMDIDX34 34 /* UNTAG_SECTOR: (MMC) + * -Addressed Command, R1 response 31:0=DADR */ +# define MMC_CMDIDX35 35 /* TAG_ERASE_GROUP_START: Sets address of first block to erase (MMC) + * -Addressed Command, R1 response 31:0=DADR */ +# define MMC_CMDIDX36 36 /* TAG_ERASE_GROUP_END: Sets address of last block to erase (MMC) + * -Addressed Command, R1 response 31:0=DADR */ +# define MMC_CMDIDX37 37 /* UNTAG_ERASE_GROUP: (MMC) + * -Addressed Command, R1 response 31:0=DADR */ +# define MMCSD_CMDIDX38 38 /* ERASE: Erases all previously selected write blocks + * -Addressed Command, R1b response */ +# define MMC_CMDIDX39 39 /* FAST_IO: (MMC) + * -Addressed Command, R4 response (Complex) */ +# define MMC_CMDIDX40 40 /* GO_IRQ_STATE: (MMC) + * -Broadcast command, R5 response */ +# define MMCSD_CMDIDX42 42 /* LOCK_UNLOCK: Used to Set/Reset the Password or lock/unlock card + * -Addressed data transfer command, R1b response */ +# define SD_CMDIDX55 55 /* APP_CMD: Tells card that the next command is an application specific command + * - Addressed Command, R1 response 31:16=RCA */ +# define MMCSD_CMDIDX56 56 /* GEN_CMD: Used transfer a block to or get block from card + * -Addressed data transfer command, R1 Response */ + +/* SD/SDIO APP commands (must be preceded by CMD55) */ + +# define SD_ACMDIDX6 6 /* SET_BUS_WIDTH: + * -Addressed Command, R1 response 1:0=BUSW */ +# define SD_ACMDIDX13 13 /* SD_STATUS: Send the SD Status + * -Addressed data transfer command, R1 response */ +# define SD_ACMDIDX18 18 /* SECURE_READ_MULTIPLE_BLOCK: */ +# define SD_ACMDIDX22 22 /* SEND_NUM_WR_BLOCKS: Send number of the errorfree blocks + * -Addressed data transfer command, R1 response */ +# define SD_ACMDIDX23 23 /* SET_WR_BLK_ERASE_COUNT: Set number blocks to erase before writing + * -Addressed Command, R1 response 22:0=NBLK */ +# define SD_ACMDIDX25 25 /* SECURE_WRITE_MULTIPLE_BLOCK: */ +# define SD_ACMDIDX38 38 /* SECURE_ERASE: */ +# define SD_ACMDIDX41 41 /* SD_SEND_OP_COND: Sends host capacity support information + * -Broadcast command, R3 response 31:0=OCR */ +# define SD_ACMDIDX42 42 /* SET_CLR_CARD_DETECT: Connect/disconnect pull-up resistor on CS + * Addressed Command, R1 response 0:0=CD */ +# define SD_ACMDIDX43 43 /* GET_MKB: */ +# define SD_ACMDIDX44 44 /* GET_MID: */ +# define SD_ACMDIDX45 45 /* SET_CER_RN1: */ +# define SD_ACMDIDX46 46 /* GET_CER_RN2: */ +# define SD_ACMDIDX47 47 /* SET_CER_RES2: */ +# define SD_ACMDIDX48 48 /* GET_CER_RES1/WRITE_MKB: */ +# define SD_ACMDIDX49 49 /* CHANGE_SECURE_AREA: */ +# define SD_ACMDIDX51 51 /* SEND_SCR: Reads the SD Configuration Register (SCR) + * Addressed data transfer command, R1 response */ +# define SDIO_ACMDIDX52 52 /* IO_RW_DIRECT: (SDIO only) + * -R5 response, 23:16=status 15:8=data */ +# define SDIO_ACMDIDX53 53 /* IO_RW_EXTENDED: (SDIO only) + * -R5 response, 23:16=status */ + +/* Response Encodings */ + +#define MMCSD_RESPONSE_SHIFT (6) +#define MMCSD_RESPONSE_MASK (15 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_NO_RESPONSE (0 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_R1_RESPONSE (1 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_R1B_RESPONSE (2 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_R2_RESPONSE (3 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_R3_RESPONSE (4 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_R4_RESPONSE (5 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_R5_RESPONSE (6 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_R6_RESPONSE (7 << MMCSD_RESPONSE_SHIFT) +# define MMCSD_R7_RESPONSE (8 << MMCSD_RESPONSE_SHIFT) + +/* Fully decorated MMC, SD, SDIO commands */ + +#define MMCSD_CMD0 (MMCSD_CMDIDX0 |MMCSD_NO_RESPONSE) +#define MMC_CMD1 (MMC_CMDIDX1 |MMCSD_R3_RESPONSE) +#define MMCSD_CMD2 (MMCSD_CMDIDX2 |MMCSD_R2_RESPONSE) +#define MMC_CMD3 (MMC_CMDIDX3 |MMCSD_R1_RESPONSE) +#define SD_CMD3 (SD_CMDIDX3 |MMCSD_R6_RESPONSE) +#define MMCSD_CMD4 (MMCSD_CMDIDX4 |MMCSD_NO_RESPONSE) +#define SDIO_CMD5 (SDIO_CMDIDX5 |MMCSD_R4_RESPONSE) +#define MMCSD_CMD6 (MMCSD_CMDIDX6 |MMCSD_R1_RESPONSE) +#define MMCSD_CMD7S (MMCSD_CMDIDX7 |MMCSD_R1B_RESPONSE) +#define MMCSD_CMD7D (MMCSD_CMDIDX7 |MMCSD_NO_RESPONSE) /* No response when de-selecting card */ +#define SD_CMD8 (SD_CMDIDX8 |MMCSD_R7_RESPONSE) +#define MMCSD_CMD9 (MMCSD_CMDIDX9 |MMCSD_R2_RESPONSE) +#define MMCSD_CMD10 (MMCSD_CMDIDX10|MMCSD_R2_RESPONSE) +#define MMC_CMD11 (MMC_CMDIDX11 |MMCSD_R1_RESPONSE) +#define MMCSD_CMD12 (MMCSD_CMDIDX12|MMCSD_R1B_RESPONSE) +#define MMCSD_CMD13 (MMCSD_CMDIDX13|MMCSD_R1_RESPONSE) +#define MMCSD_CMD14 (MMCSD_CMDIDX14|MMCSD_R1_RESPONSE) +#define MMCSD_CMD15 (MMCSD_CMDIDX15|MMCSD_R1_RESPONSE) +#define MMCSD_CMD16 (MMCSD_CMDIDX16|MMCSD_R1_RESPONSE) +#define MMCSD_CMD17 (MMCSD_CMDIDX17|MMCSD_R1_RESPONSE) +#define MMCSD_CMD18 (MMCSD_CMDIDX18|MMCSD_R1_RESPONSE) +#define MMCSD_CMD19 (MMCSD_CMDIDX19|MMCSD_R1_RESPONSE) +#define MMC_CMD23 (MMC_CMDIDX23 |MMCSD_R1_RESPONSE) +#define MMCSD_CMD24 (MMCSD_CMDIDX24|MMCSD_R1_RESPONSE) +#define MMCSD_CMD25 (MMCSD_CMDIDX25|MMCSD_R1_RESPONSE) +#define MMCSD_CMD26 (MMCSD_CMDIDX26|MMCSD_R1_RESPONSE) +#define MMCSD_CMD27 (MMCSD_CMDIDX27|MMCSD_R1_RESPONSE) +#define MMCSD_CMD28 (MMCSD_CMDIDX28|MMCSD_R1B_RESPONSE) +#define MMCSD_CMD29 (MMCSD_CMDIDX29|MMCSD_R1B_RESPONSE) +#define MMCSD_CMD30 (MMCSD_CMDIDX30|MMCSD_R1_RESPONSE) +#define SD_CMD32 (SD_CMDIDX32 |MMCSD_R1_RESPONSE) +#define SD_CMD33 (SD_CMDIDX33 |MMCSD_R1_RESPONSE) +#define MMC_CMD34 (MMC_CMDIDX34 |MMCSD_R1_RESPONSE) +#define MMC_CMD35 (MMC_CMDIDX35 |MMCSD_R1_RESPONSE) +#define MMC_CMD36 (MMC_CMDIDX36 |MMCSD_R1_RESPONSE) +#define MMC_CMD37 (MMC_CMDIDX37 |MMCSD_R1_RESPONSE) +#define MMCSD_CMD38 (MMCSD_CMDIDX38|MMCSD_R1B_RESPONSE) +#define MMC_CMD39 (MMC_CMDIDX39 |MMCSD_R4_RESPONSE) +#define MMC_CMD40 (MMC_CMDIDX40 |MMCSD_R5_RESPONSE) +#define MMCSD_CMD42 (MMCSD_CMDIDX42|MMCSD_R1B_RESPONSE) +#define SD_CMD55 (SD_CMDIDX55 |MMCSD_R1_RESPONSE) +#define MMCSD_CMD56 (MMCSD_CMDIDX56|MMCSD_R1_RESPONSE) + +/* SD/SDIO APP commands (must be preceded by CMD55) */ + +#define SD_ACMD6 (SD_ACMDIDX6 |MMCSD_R1_RESPONSE) +#define SD_ACMD13 (SD_ACMDIDX13 |MMCSD_R1_RESPONSE) +#define SD_ACMD18 (SD_ACMDIDX18 |MMCSD_R1_RESPONSE) +#define SD_ACMD22 (SD_ACMDIDX22 |MMCSD_R1_RESPONSE) +#define SD_ACMD23 (SD_ACMDIDX23 |MMCSD_R1_RESPONSE) +#define SD_ACMD25 (SD_ACMDIDX25 |MMCSD_R1_RESPONSE) +#define SD_ACMD38 (SD_ACMDIDX38 |MMCSD_R1_RESPONSE) +#define SD_ACMD41 (SD_ACMDIDX41 |MMCSD_R3_RESPONSE) +#define SD_ACMD42 (SD_ACMDIDX42 |MMCSD_R1_RESPONSE) +#define SD_ACMD43 (SD_ACMDIDX43 |MMCSD_R1_RESPONSE) +#define SD_ACMD44 (SD_ACMDIDX44 |MMCSD_R1_RESPONSE) +#define SD_ACMD45 (SD_ACMDIDX45 |MMCSD_R1_RESPONSE) +#define SD_ACMD46 (SD_ACMDIDX46 |MMCSD_R1_RESPONSE) +#define SD_ACMD47 (SD_ACMDIDX47 |MMCSD_R1_RESPONSE) +#define SD_ACMD48 (SD_ACMDIDX48 |MMCSD_R1_RESPONSE) +#define SD_ACMD49 (SD_ACMDIDX49 |MMCSD_R1_RESPONSE) +#define SD_ACMD51 (SD_ACMDIDX51 |MMCSD_R1_RESPONSE) +#define SDIO_ACMD52 (SDIO_ACMDIDX52|MMCSD_R5_RESPONSE) +#define SDIO_ACMD53 (SDIO_ACMDIDX53|MMCSD_R5_RESPONSE) + /**************************************************************************** * Name: SDIO_RESET * @@ -179,7 +386,7 @@ * * Input Parameters: * dev - An instance of the MMC/SD device interface - * cmd - The command to send + * cmd - The command to send. See 32-bit command definitions above. * arg - 32-bit argument required with some commands * data - A reference to data required with some commands * @@ -494,7 +701,7 @@ struct sdio_dev_s /* Command/Status/Data Transfer */ - void (*sendcmd)(FAR struct sdio_dev_s *dev, ubyte cmd, uint32 arg, FAR const ubyte *data); + void (*sendcmd)(FAR struct sdio_dev_s *dev, uint32 cmd, uint32 arg, FAR const ubyte *data); int (*senddata)(FAR struct sdio_dev_s *dev, FAR const ubyte *buffer); int (*recvR1)(FAR struct sdio_dev_s *dev, uint16 buffer[3]); |