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author | Gregory Nutt <gnutt@nuttx.org> | 2015-03-09 18:14:31 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2015-03-09 18:14:31 -0600 |
commit | b0c9c6933f869a8695d2927f42ea440024f5f303 (patch) | |
tree | e50c4aab9347c9ef3e9dc55de0800843447f5fcc /nuttx | |
parent | 94d8f49c40f17f52b5fd26fb6a09b366fcf676d7 (diff) | |
download | px4-nuttx-b0c9c6933f869a8695d2927f42ea440024f5f303.tar.gz px4-nuttx-b0c9c6933f869a8695d2927f42ea440024f5f303.tar.bz2 px4-nuttx-b0c9c6933f869a8695d2927f42ea440024f5f303.zip |
Cosmetic changes to conditional compilation
Diffstat (limited to 'nuttx')
-rw-r--r-- | nuttx/arch/arm/src/samv7/sam_xdmac.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/nuttx/arch/arm/src/samv7/sam_xdmac.c b/nuttx/arch/arm/src/samv7/sam_xdmac.c index c29a156a7..662d20257 100644 --- a/nuttx/arch/arm/src/samv7/sam_xdmac.c +++ b/nuttx/arch/arm/src/samv7/sam_xdmac.c @@ -92,6 +92,11 @@ # define CONFIG_SAMV7_NLLDESC SAMV7_NDMACHAN #endif +/* These cache operations are not yet available */ + +#undef HAVE_CLEAN_DCACHE_RANGE +#undef HAVE_INVALIDATE_DCACHE_RANGE + /**************************************************************************** * Private Types ****************************************************************************/ @@ -1086,7 +1091,7 @@ sam_allocdesc(struct sam_xdmach_s *xdmach, struct chnext_view1_s *prev, xdmach->lltail = descr; -#if 0 /* REVISIT */ +#ifdef HAVE_CLEAN_DCACHE_RANGE /* REVISIT */ /* Assume that we will be doing multiple buffer transfers and that * that hardware will be accessing the descriptor via DMA. */ @@ -1098,7 +1103,7 @@ sam_allocdesc(struct sam_xdmach_s *xdmach, struct chnext_view1_s *prev, } } -#if 1 /* REVISIT */ +#ifndef HAVE_CLEAN_DCACHE_RANGE /* REVISIT */ /* Assume that we will be doing multiple buffer transfers and that * that hardware will be accessing the descriptors via DMA. */ @@ -1502,7 +1507,7 @@ static void sam_dmaterminate(struct sam_xdmach_s *xdmach, int result) * to force reloads from memory. */ -#if 0 /* Revisit */ +#ifdef HAVE_INVALIDATE_DCACHE_RANGE /* Revisit */ if (xdmach->rx) { arch_invalidate_dcache(xdmach->rxaddr, xdmach->rxaddr + xdmach->rxsize); @@ -1868,7 +1873,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, /* Clean caches associated with the DMA memory */ -#if 0 /* REVISIT */ +#ifdef HAVE_CLEAN_DCACHE_RANGE /* REVISIT */ arch_clean_dcache(maddr, maddr + nbytes); #else arch_clean_dcache_all(); @@ -1953,7 +1958,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, /* Clean caches associated with the DMA memory */ -#if 0 /* REVISIT */ +#ifdef HAVE_CLEAN_DCACHE_RANGE /* REVISIT */ arch_clean_dcache(maddr, maddr + nbytes); #else arch_clean_dcache_all(); |