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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-08-02 21:48:54 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2012-08-02 21:48:54 +0000
commitb0e7dc40263ad1886dd39df2181a5a150250b726 (patch)
tree43bcabdd8062bbd95eb746356950759d1a64c0b3 /nuttx
parentb7ab7f5ea41b6b230e133e1c847dbbfc2d8ee421 (diff)
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Add stm32_clockenable() to support recovery from deep sleep low-power usage modes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5000 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx')
-rw-r--r--nuttx/ChangeLog3
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_rcc.c67
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_rcc.h38
-rw-r--r--nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c2
-rw-r--r--nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c2
-rw-r--r--nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c2
6 files changed, 110 insertions, 4 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index fab1d0167..5ebfded10 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -3115,4 +3115,7 @@
from drivers/syslog to fs/ where is belongs. Especially after realizing that
the syslog logic is going to have to some internal FS operations in order
to realize a totally thread-independent SYSLOG interface.
+ * arch/arm/src/stm32/stm32*_rcc.c and .h: If CONFIG_PM is defined, add a
+ function called stm32_clockenable() that can be used by PM logic to re-start
+ the PLL after re-awakening from deep sleep modes.
diff --git a/nuttx/arch/arm/src/stm32/stm32_rcc.c b/nuttx/arch/arm/src/stm32/stm32_rcc.c
index 47a4b550f..49943baa3 100644
--- a/nuttx/arch/arm/src/stm32/stm32_rcc.c
+++ b/nuttx/arch/arm/src/stm32/stm32_rcc.c
@@ -90,6 +90,27 @@
* Public Functions
****************************************************************************/
+/************************************************************************************
+ * Name: stm32_clockconfig
+ *
+ * Description:
+ * Called to establish the clock settings based on the values in board.h. This
+ * function (by default) will reset most everything, enable the PLL, and enable
+ * peripheral clocking for all periperipherals enabled in the NuttX configuration
+ * file.
+ *
+ * If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
+ * be enabled by an externally provided, board-specific function called
+ * stm32_board_clockconfig().
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ************************************************************************************/
+
void stm32_clockconfig(void)
{
/* Make sure that we are starting in the reset state */
@@ -114,3 +135,49 @@ void stm32_clockconfig(void)
rcc_enableperipherals();
}
+
+/************************************************************************************
+ * Name: stm32_clockenable
+ *
+ * Description:
+ * Re-enable the clock and restore the clock settings based on settings in board.h.
+ * This function is only available to support low-power modes of operation: When
+ * re-awakening from deep-sleep modes, it is necessary to re-enable/re-start the
+ * PLL
+ *
+ * This functional performs a subset of the operations performed by
+ * stm32_clockconfig(): It does not reset any devices, and it does not reset the
+ * currenlty enabled peripheral clocks.
+ *
+ * If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
+ * be enabled by an externally provided, board-specific function called
+ * stm32_board_clockconfig().
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PM
+void stm32_clockenable(void);
+{
+#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
+
+ /* Invoke Board Custom Clock Configuration */
+
+ stm32_board_clockconfig();
+
+#else
+
+ /* Invoke standard, fixed clock configuration based on definitions in board.h */
+
+ stm32_stdclockconfig();
+
+#endif
+}
+#endif
+
+
diff --git a/nuttx/arch/arm/src/stm32/stm32_rcc.h b/nuttx/arch/arm/src/stm32/stm32_rcc.h
index 3edf74782..c4d43db3a 100644
--- a/nuttx/arch/arm/src/stm32/stm32_rcc.h
+++ b/nuttx/arch/arm/src/stm32/stm32_rcc.h
@@ -156,7 +156,14 @@ static inline void stm32_mco2config(uint32_t source, uint32_t div)
* Name: stm32_clockconfig
*
* Description:
- * Called to change to new clock based on settings in board.h
+ * Called to establish the clock settings based on the values in board.h. This
+ * function (by default) will reset most everything, enable the PLL, and enable
+ * peripheral clocking for all periperipherals enabled in the NuttX configuration
+ * file.
+ *
+ * If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
+ * be enabled by an externally provided, board-specific function called
+ * stm32_board_clockconfig().
*
* Input Parameters:
* None
@@ -169,6 +176,35 @@ static inline void stm32_mco2config(uint32_t source, uint32_t div)
EXTERN void stm32_clockconfig(void);
/************************************************************************************
+ * Name: stm32_clockenable
+ *
+ * Description:
+ * Re-enable the clock and restore the clock settings based on settings in board.h.
+ * This function is only available to support low-power modes of operation: When
+ * re-awakening from deep-sleep modes, it is necessary to re-enable/re-start the
+ * PLL
+ *
+ * This functional performs a subset of the operations performed by
+ * stm32_clockconfig(): It does not reset any devices, and it does not reset the
+ * currenlty enabled peripheral clocks.
+ *
+ * If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
+ * be enabled by an externally provided, board-specific function called
+ * stm32_board_clockconfig().
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * None
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_PM
+EXTERN void stm32_clockenable(void);
+#endif
+
+/************************************************************************************
* Name: stm32_rcc_enablelse
*
* Description:
diff --git a/nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c
index f9e3cb7a6..516b026fb 100644
--- a/nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c
+++ b/nuttx/arch/arm/src/stm32/stm32f10xxx_rcc.c
@@ -412,7 +412,7 @@ static inline void rcc_enableapb2(void)
****************************************************************************/
#ifndef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
-static inline void stm32_stdclockconfig(void)
+static void stm32_stdclockconfig(void)
{
uint32_t regval;
diff --git a/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c
index fac15902f..8cfd405de 100644
--- a/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c
+++ b/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c
@@ -548,7 +548,7 @@ static inline void rcc_enableapb2(void)
****************************************************************************/
#ifndef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
-static inline void stm32_stdclockconfig(void)
+static void stm32_stdclockconfig(void)
{
uint32_t regval;
volatile int32_t timeout;
diff --git a/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c
index 3575f419e..7ba341b2b 100644
--- a/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c
+++ b/nuttx/arch/arm/src/stm32/stm32f40xxx_rcc.c
@@ -550,7 +550,7 @@ static inline void rcc_enableapb2(void)
****************************************************************************/
#ifndef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
-static inline void stm32_stdclockconfig(void)
+static void stm32_stdclockconfig(void)
{
uint32_t regval;
volatile int32_t timeout;