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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-03-28 17:18:25 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-03-28 17:18:25 +0000 |
commit | ebbcb01981e2ac45821fda0d9501d42447d85658 (patch) | |
tree | 76b5bdbb72748a2857f3498f3cb8488c29c9ed77 /nuttx | |
parent | 8feefeef77e0b7a420545511d8494d45b745116e (diff) | |
download | px4-nuttx-ebbcb01981e2ac45821fda0d9501d42447d85658.tar.gz px4-nuttx-ebbcb01981e2ac45821fda0d9501d42447d85658.tar.bz2 px4-nuttx-ebbcb01981e2ac45821fda0d9501d42447d85658.zip |
FIFOCFG should be configurable
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2560 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx')
-rwxr-xr-x | nuttx/arch/arm/src/sam3u/sam3u_dmac.c | 2 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/sam3u/sam3u_hsmci.c | 2 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/sam3u/sam3u_internal.h | 36 |
3 files changed, 26 insertions, 14 deletions
diff --git a/nuttx/arch/arm/src/sam3u/sam3u_dmac.c b/nuttx/arch/arm/src/sam3u/sam3u_dmac.c index e97d4d0a5..7680f93db 100755 --- a/nuttx/arch/arm/src/sam3u/sam3u_dmac.c +++ b/nuttx/arch/arm/src/sam3u/sam3u_dmac.c @@ -70,7 +70,7 @@ struct sam3u_dma_s { uint8_t chan; /* DMA channel number (0-6) */ bool inuse; /* TRUE: The DMA channel is in use */ - uint16_t flags; /* DMA channel flags */ + uint32_t flags; /* DMA channel flags */ uint32_t base; /* DMA register channel base address */ dma_callback_t callback; /* Callback invoked when the DMA completes */ void *arg; /* Argument passed to callback function */ diff --git a/nuttx/arch/arm/src/sam3u/sam3u_hsmci.c b/nuttx/arch/arm/src/sam3u/sam3u_hsmci.c index b47290deb..795cac954 100755 --- a/nuttx/arch/arm/src/sam3u/sam3u_hsmci.c +++ b/nuttx/arch/arm/src/sam3u/sam3u_hsmci.c @@ -120,7 +120,7 @@ /* DMA configuration flags */ #define DMA_FLAGS \ - ((DMACHAN_PID_MCI0 << DMACH_FLAG_PERIPHPID_SHIFT) | \ + (DMACH_FLAG_FIFO_8BYTES | DMACH_FLAG_FIFOCFG_LARGEST | (DMACHAN_PID_MCI0 << DMACH_FLAG_PERIPHPID_SHIFT) | \ DMACH_FLAG_PERIPHH2SEL | DMACH_FLAG_PERIPHLLIMODE | DMACH_FLAG_PERIPHWIDTH_32BITS | \ DMACH_FLAG_MEMLLIMODE | DMACH_FLAG_MEMWIDTH_32BITS | DMACH_FLAG_MEMINCREMENT) diff --git a/nuttx/arch/arm/src/sam3u/sam3u_internal.h b/nuttx/arch/arm/src/sam3u/sam3u_internal.h index d3fdd26a5..a6ff75ba6 100755 --- a/nuttx/arch/arm/src/sam3u/sam3u_internal.h +++ b/nuttx/arch/arm/src/sam3u/sam3u_internal.h @@ -305,31 +305,43 @@ # define DMACH_FLAG_FIFO_8BYTES (0 << DMACH_FLAG_FIFOSIZE_SHIFT) /* 8 bytes */ # define DMACH_FLAG_FIFO_32BYTES (1 << DMACH_FLAG_FIFOSIZE_SHIFT) /* 32 bytes */ +/* Configurable properties of the channel */ + +#define DMACH_FLAG_BURST_LARGEST 0 /* Largest length AHB burst */ +#define DMACH_FLAG_BURST_HALF 1 /* Half FIFO size */ +#define DMACH_FLAG_BURST_SINGLE 2 /* Single AHB access */ + +#define DMACH_FLAG_FIFOCFG_SHIFT (2) /* Bits 2-3: FIFO configuration */ +#define DMACH_FLAG_FIFOCFG_MASK (3 << DMACH_FLAG_FIFOCFG_SHIFT) +# define DMACH_FLAG_FIFOCFG_LARGEST (DMACH_FLAG_BURST_LARGEST << DMACH_FLAG_FIFOCFG_SHIFT +# define DMACH_FLAG_FIFOCFG_HALF (DMACH_FLAG_BURST_HALF << DMACH_FLAG_FIFOCFG_SHIFT) +# define DMACH_FLAG_FIFOCFG_SINGLE (DMACH_FLAG_BURST_SINGLE << DMACH_FLAG_FIFOCFG_SHIFT) + /* Peripheral endpoint characteristics */ -#define DMACH_FLAG_PERIPHPID_SHIFT (2) /* Bits 2-5: Peripheral PID */ +#define DMACH_FLAG_PERIPHPID_SHIFT (4) /* Bits 4-7: Peripheral PID */ #define DMACH_FLAG_PERIPHPID_MASK (15 << DMACH_FLAG_PERIPHPID_SHIFT) -#define DMACH_FLAG_PERIPHH2SEL (1 << 6) /* Bits 6: HW handshaking */ -#define DMACH_FLAG_PERIPHWIDTH_SHIFT (7) /* Bits 7-8: Peripheral width */ +#define DMACH_FLAG_PERIPHH2SEL (1 << 8) /* Bits 8: HW handshaking */ +#define DMACH_FLAG_PERIPHWIDTH_SHIFT (9) /* Bits 9-10: Peripheral width */ #define DMACH_FLAG_PERIPHWIDTH_MASK (3 << DMACH_FLAG_PERIPHWIDTH_SHIFT) # define DMACH_FLAG_PERIPHWIDTH_8BITS (0 << DMACH_FLAG_PERIPHWIDTH_SHIFT) /* 8 bits */ # define DMACH_FLAG_PERIPHWIDTH_16BITS (1 << DMACH_FLAG_PERIPHWIDTH_SHIFT) /* 16 bits */ -# define DMACH_FLAG_PERIPHWIDTH_32BITS (2 << DMACH_FLAG_PERIPHWIDTH_SHIFT) /* 16 bits */ -#define DMACH_FLAG_PERIPHINCREMENT (1 << 9) /* Bit 9: Autoincrement peripheral address */ -#define DMACH_FLAG_PERIPHLLIMODE (1 << 10) /* Bit 10: Use link list descriptors */ +# define DMACH_FLAG_PERIPHWIDTH_32BITS (2 << DMACH_FLAG_PERIPHWIDTH_SHIFT) /* 32 bits */ +#define DMACH_FLAG_PERIPHINCREMENT (1 << 11) /* Bit 11: Autoincrement peripheral address */ +#define DMACH_FLAG_PERIPHLLIMODE (1 << 12) /* Bit 12: Use link list descriptors */ /* Memory endpoint characteristics */ -#define DMACH_FLAG_MEMPID_SHIFT (11) /* Bits 11-14: Memory PID */ +#define DMACH_FLAG_MEMPID_SHIFT (13) /* Bits 13-16: Memory PID */ #define DMACH_FLAG_MEMPID_MASK (15 << DMACH_FLAG_PERIPHPID_SHIFT) -#define DMACH_FLAG_MEMH2SEL (1 << 15) /* Bits 15: HW handshaking */ -#define DMACH_FLAG_MEMWIDTH_SHIFT (16) /* Bits 16-17: Memory width */ +#define DMACH_FLAG_MEMH2SEL (1 << 17) /* Bits 17: HW handshaking */ +#define DMACH_FLAG_MEMWIDTH_SHIFT (18) /* Bits 18-19: Memory width */ #define DMACH_FLAG_MEMWIDTH_MASK (3 << DMACH_FLAG_MEMWIDTH_SHIFT) # define DMACH_FLAG_MEMWIDTH_8BITS (0 << DMACH_FLAG_MEMWIDTH_SHIFT) /* 8 bits */ # define DMACH_FLAG_MEMWIDTH_16BITS (1 << DMACH_FLAG_MEMWIDTH_SHIFT) /* 16 bits */ -# define DMACH_FLAG_MEMWIDTH_32BITS (2 << DMACH_FLAG_MEMWIDTH_SHIFT) /* 16 bits */ -#define DMACH_FLAG_MEMINCREMENT (1 << 18) /* Bit 18: Autoincrement memory address */ -#define DMACH_FLAG_MEMLLIMODE (1 << 19) /* Bit 19: Use link list descriptors */ +# define DMACH_FLAG_MEMWIDTH_32BITS (2 << DMACH_FLAG_MEMWIDTH_SHIFT) /* 32 bits */ +#define DMACH_FLAG_MEMINCREMENT (1 << 20) /* Bit 20: Autoincrement memory address */ +#define DMACH_FLAG_MEMLLIMODE (1 << 21) /* Bit 21: Use link list descriptors */ /************************************************************************************ * Public Types |