Mirtoo: Switch to SPI mode 1

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4872 42af7a65-404d-4744-a932-0658087f49c3

4 files changed, 23 insertions, 9 deletions

diff --git a/nuttx/configs/mirtoo/README.txt b/nuttx/configs/mirtoo/README.txt
index e415db3a7..7867dad3f 100644
--- a/nuttx/configs/mirtoo/README.txt
+++ b/nuttx/configs/mirtoo/README.txt
@@ -865,3 +865,17 @@ Where <subdir> is one of the following:
        CONFIG_NSH_DISABLE_SH=y
        CONFIG_NSH_DISABLE_TEST=y
        CONFIG_NSH_DISABLE_WGET=y
+
+     NOTES:  (1) It takes many seconds to boot the sytem using the NXFFS
+     file system because the entire FLASH must be verified on power up.
+     (2) FAT does not have this delay and this configuration can be
+     modified to use the (larger) FAT file system as described below:
+
+  fat:
+     There is no FAT configuration, but the nxffx configuration can be used
+     to support the FAT FS if the following changes are made to the NuttX
+     configuration file:
+
+       CONFIG_FS_NXFFS=n
+       CONFIG_FS_FAT=y
+       CONFIG_NSH_DISABLE_MKFATFS=n
diff --git a/nuttx/configs/mirtoo/nsh/defconfig b/nuttx/configs/mirtoo/nsh/defconfig
index 262d5bd70..a96ccbc14 100644
--- a/nuttx/configs/mirtoo/nsh/defconfig
+++ b/nuttx/configs/mirtoo/nsh/defconfig
@@ -169,8 +169,8 @@ CONFIG_PIC32MX_IOPORTC=y
 # Mirtoo Board Settings
 #
 CONFIG_MTD_SST25=n
-#CONFIG_SST25_SPIMODE
-#CONFIG_SST25_SPIFREQUENCY
+CONFIG_SST25_SPIMODE=1
+CONFIG_SST25_SPIFREQUENCY=20000000
 CONFIG_SST25_SECTOR512=n
 
 #
diff --git a/nuttx/configs/mirtoo/nxffs/defconfig b/nuttx/configs/mirtoo/nxffs/defconfig
index 7e1634c4f..8073dd828 100644
--- a/nuttx/configs/mirtoo/nxffs/defconfig
+++ b/nuttx/configs/mirtoo/nxffs/defconfig
@@ -169,9 +169,9 @@ CONFIG_PIC32MX_IOPORTC=y
 # Mirtoo Board Settings
 #
 CONFIG_MTD_SST25=y
-#CONFIG_SST25_SPIMODE
-#CONFIG_SST25_SPIFREQUENCY
-CONFIG_SST25_SECTOR512=y
+CONFIG_SST25_SPIMODE=1
+CONFIG_SST25_SPIFREQUENCY=20000000
+CONFIG_SST25_SECTOR512=n
 
 #
 # PIC32MX Configuration Settings
diff --git a/nuttx/drivers/mtd/sst25.c b/nuttx/drivers/mtd/sst25.c
index 4f86e5e2a..53eb02e46 100644
--- a/nuttx/drivers/mtd/sst25.c
+++ b/nuttx/drivers/mtd/sst25.c
@@ -60,7 +60,7 @@
  * Pre-processor Definitions
  ************************************************************************************/
 /* Configuration ********************************************************************/
-/* Per the data sheet, MP25P10 parts can be driven with either SPI mode 0 (CPOL=0 and
+/* Per the data sheet, the SST25 parts can be driven with either SPI mode 0 (CPOL=0 and
  * CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices can
  * operated in mode 0 or 1.  So you may need to specify CONFIG_SST25_SPIMODE to
  * select the best mode for your device.  If CONFIG_SST25_SPIMODE is not defined,
@@ -397,8 +397,6 @@ static void sst25_waitwritecomplete(struct sst25_dev_s *priv)
     }
   while ((status & SST25_SR_BUSY) != 0);
 #endif
-
-  fvdbg("Complete\n");
 }
 
 /************************************************************************************
@@ -946,11 +944,13 @@ static int sst25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
 
 #ifdef CONFIG_SST25_SECTOR512
               geo->blocksize    = (1 << SST25_SECTOR_SHIFT);
+              geo->erasesize    = (1 << SST25_SECTOR_SHIFT);
+              geo->neraseblocks = priv->nsectors << (priv->sectorshift - );
 #else
               geo->blocksize    = (1 << priv->sectorshift);
-#endif
               geo->erasesize    = (1 << priv->sectorshift);
               geo->neraseblocks = priv->nsectors;
+#endif
               ret               = OK;
 
               fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",