diff options
author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-23 02:25:53 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-02-23 02:25:53 +0000 |
commit | f6cc3cf96afa3b5fd0d633fe532f45316da4bdad (patch) | |
tree | 33c0ae7de055a4b4bc9762893a936798421900ca /nuttx | |
parent | 8dc2d637b75a2edc0f53a1029a9a45fc2792bfb8 (diff) | |
download | px4-nuttx-f6cc3cf96afa3b5fd0d633fe532f45316da4bdad.tar.gz px4-nuttx-f6cc3cf96afa3b5fd0d633fe532f45316da4bdad.tar.bz2 px4-nuttx-f6cc3cf96afa3b5fd0d633fe532f45316da4bdad.zip |
Buildroot now builds armv6-m toolchain; NuTiny configuration now uses buildroot toolchain
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5665 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx')
-rw-r--r-- | nuttx/arch/arm/include/nuc1xx/chip.h | 104 | ||||
-rw-r--r-- | nuttx/arch/arm/include/nuc1xx/irq.h | 5 | ||||
-rw-r--r-- | nuttx/arch/arm/src/armv6-m/Kconfig | 12 | ||||
-rw-r--r-- | nuttx/arch/arm/src/armv6-m/Toolchain.defs | 22 | ||||
-rw-r--r-- | nuttx/arch/arm/src/nuc1xx/chip/nuc_config.h | 8 | ||||
-rw-r--r-- | nuttx/configs/nutiny-nuc120/README.txt | 43 | ||||
-rw-r--r-- | nuttx/configs/nutiny-nuc120/ostest/defconfig | 169 | ||||
-rwxr-xr-x | nuttx/configs/nutiny-nuc120/ostest/setenv.sh | 4 | ||||
-rw-r--r-- | nuttx/fs/fs_closedir.c | 4 |
9 files changed, 195 insertions, 176 deletions
diff --git a/nuttx/arch/arm/include/nuc1xx/chip.h b/nuttx/arch/arm/include/nuc1xx/chip.h index 0cf2c89b8..bfc018947 100644 --- a/nuttx/arch/arm/include/nuc1xx/chip.h +++ b/nuttx/arch/arm/include/nuc1xx/chip.h @@ -50,6 +50,10 @@ /* NUC100 Advanced Line (Low Density) */ #if defined(CONFIG_ARCH_CHIP_NUC100LC1BN) /* Flash 32K SRAM 4K, LQFP48 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (32*1024) /* 32K FLASH */ # define NUC_SRAM (4*1024) /* 4K SRAM */ # define NUC_NIO 35 /* (35) GPIO */ @@ -68,6 +72,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100LD1BN) /* Flash 64K SRAM 4K, LQFP48 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (4*1024) /* 4K SRAM */ # define NUC_NIO 31 /* (35) GPIO */ @@ -86,6 +94,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100LD2BN) /* Flash 64K SRAM 8K, LQFP48 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (8*1024) /* 8K SRAM */ # define NUC_NIO 31 /* (35) GPIO */ @@ -104,6 +116,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100RC1BN) /* Flash 32K SRAM 4K, LQFP64 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (32*1024) /* 32K FLASH */ # define NUC_SRAM (4*1024) /* 4K SRAM */ # define NUC_NIO 49 /* (49) GPIO */ @@ -122,6 +138,10 @@ # define NUC_RTC 1 /* RTC */ # define NUC_EBI 1 /* Supports EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100RD1BN) /* Flash 64K SRAM 4K, LQFP64 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (4*1024) /* 4K SRAM */ # define NUC_NIO 49 /* (49) GPIO */ @@ -140,6 +160,10 @@ # define NUC_RTC 1 /* RTC */ # define NUC_EBI 1 /* Supports EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100RD2BN) /* Flash 64K SRAM 8K, LQFP64 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (8*1024) /* 4K SRAM */ # define NUC_NIO 49 /* (49) GPIO */ @@ -161,6 +185,10 @@ /* NUC100 Advanced Line (Medium Density) */ #elif defined(CONFIG_ARCH_CHIP_NUC100LD3AN) /* Flash 64K SRAM 16K, LQFP48 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 35 /* (35) GPIO */ @@ -179,6 +207,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100LE3AN) /* Flash 128K SRAM 16K, LQFP48 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (128*1024) /* 64K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 35 /* (35) GPIO */ @@ -197,6 +229,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100RD3AN) /* Flash 64K SRAM 16K, LQFP64 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 49 /* (49) GPIO */ @@ -215,6 +251,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100RE3AN) /* Flash 128K SRAM 16K, LQFP64 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (128*1024) /* 128K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 49 /* (49) GPIO */ @@ -233,6 +273,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100VD2AN) /* Flash 64K SRAM 8K, LQFP100 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (8*1024) /* 8K SRAM */ # define NUC_NIO 80 /* (80) GPIO */ @@ -251,6 +295,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100VD3AN) /* Flash 64K SRAM 16K, LQFP100 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 80 /* (80) GPIO */ @@ -269,6 +317,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC100VE3AN) /* Flash 128K SRAM 8K, LQFP100 package */ +# define NUC100 1 /* NUC100 family */ +# undef NUC120 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (128*1024) /* 128K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 80 /* (80) GPIO */ @@ -290,6 +342,10 @@ /* NUC120 USB Line (Low Density) */ #elif defined(CONFIG_ARCH_CHIP_NUC120LC1BN) /* Flash 32K SRAM 4K, LQFP48 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (32*1024) /* 32K FLASH */ # define NUC_SRAM (4*1024) /* 4K SRAM */ # define NUC_NIO 31 /* (31) GPIO */ @@ -308,6 +364,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120LD1BN) /* Flash 64K SRAM 4K, LQFP48 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (4*1024) /* 4K SRAM */ # define NUC_NIO 31 /* (31) GPIO */ @@ -326,6 +386,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120LD2BN) /* Flash 64K SRAM 8K, LQFP48 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (8*1024) /* 8K SRAM */ # define NUC_NIO 31 /* (31) GPIO */ @@ -344,6 +408,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120RC1BN) /* Flash 32K SRAM 4K, LQFP64 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (32*1024) /* 32K FLASH */ # define NUC_SRAM (4*1024) /* 4K SRAM */ # define NUC_NIO 45 /* (45) GPIO */ @@ -362,6 +430,10 @@ # define NUC_RTC 1 /* RTC */ # define NUC_EBI 1 /* Have EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120RD1BN) /* Flash 64K SRAM 4K, LQFP64 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (4*1024) /* 4K SRAM */ # define NUC_NIO 45 /* (45) GPIO */ @@ -380,6 +452,10 @@ # define NUC_RTC 1 /* RTC */ # define NUC_EBI 1 /* Have EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120RD2BN) /* Flash 64K SRAM 8K, LQFP64 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# define NUC_LOW 1 /* Low density part */ +# undef NUC_MEDIUM /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (8*1024) /* 8K SRAM */ # define NUC_NIO 45 /* (45) GPIO */ @@ -401,6 +477,10 @@ /* NUC120 USB Line (Medium Density) */ #elif defined(CONFIG_ARCH_CHIP_NUC120LD3AN) /* Flash 64K SRAM 16K, LQFP48 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 31 /* (31) GPIO */ @@ -419,6 +499,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120LE3AN) /* Flash 128K SRAM 16K, LQFP48 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (128*1024) /* 128K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 31 /* (31) GPIO */ @@ -437,6 +521,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120RD3AN) /* Flash 64K SRAM 16K, LQFP64 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 45 /* (45) GPIO */ @@ -455,6 +543,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120RE3AN) /* Flash 128K SRAM 16K, LQFP64 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (128*1024) /* 128K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 45 /* (45) GPIO */ @@ -473,6 +565,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120VD2AN) /* Flash 64K SRAM 8K, LQFP100 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (8*1024) /* 8K SRAM */ # define NUC_NIO 76 /* (76) GPIO */ @@ -491,6 +587,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120VD3AN) /* Flash 64K SRAM 16K, LQFP100 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (64*1024) /* 64K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 76 /* (76) GPIO */ @@ -509,6 +609,10 @@ # define NUC_RTC 1 /* RTC */ # undef NUC_EBI /* No EBI */ #elif defined(CONFIG_ARCH_CHIP_NUC120VE3AN) /* Flash 128K SRAM 16K, LQFP100 package */ +# undef NUC100 /* NUC100 family */ +# define NUC120 1 /* NUC120 family */ +# undef NUC_LOW /* Low density part */ +# define NUC_MEDIUM 1 /* Medium density part */ # define NUC_FLASH (128*1024) /* 128K FLASH */ # define NUC_SRAM (16*1024) /* 16K SRAM */ # define NUC_NIO 76 /* (76) GPIO */ diff --git a/nuttx/arch/arm/include/nuc1xx/irq.h b/nuttx/arch/arm/include/nuc1xx/irq.h index fcea3e165..4c2eea267 100644 --- a/nuttx/arch/arm/include/nuc1xx/irq.h +++ b/nuttx/arch/arm/include/nuc1xx/irq.h @@ -45,6 +45,7 @@ ************************************************************************************/ #include <nuttx/config.h> +#include <arch/nuc1xx/chip.h> /************************************************************************************ * Pre-processor Definitions @@ -72,10 +73,10 @@ #define NUC_IRQ_INTERRUPT (16) -#if defined(CONFIG_ARCH_CHIP_NUC120) +#if defined(NUC120) # include <arch/nuc1xx/nuc120_irq.h> #else -# error "Unrecognized NUC chip" +# error "Unrecognized/unsupported NUC chip" #endif /************************************************************************************ diff --git a/nuttx/arch/arm/src/armv6-m/Kconfig b/nuttx/arch/arm/src/armv6-m/Kconfig index 3dea706d4..e22ef5a8f 100644 --- a/nuttx/arch/arm/src/armv6-m/Kconfig +++ b/nuttx/arch/arm/src/armv6-m/Kconfig @@ -44,16 +44,4 @@ config ARMV6M_TOOLCHAIN_GNU_EABI This option should work for any modern GNU toolchain (GCC 4.5 or newer) configured for arm-none-eabi. -config ARMV6M_TOOLCHAIN_RAISONANCE - bool "STMicro Raisonance for Windows" - depends on HOST_WINDOWS - endchoice - -config ARMV6M_OABI_TOOLCHAIN - bool "OABI (vs EABI)" - default y - depends on ARMV6M_TOOLCHAIN_BUILDROOT - ---help--- - Most of the older buildroot toolchains are OABI and are named arm-nuttx-elf- vs. arm-nuttx-eabi- - diff --git a/nuttx/arch/arm/src/armv6-m/Toolchain.defs b/nuttx/arch/arm/src/armv6-m/Toolchain.defs index 064517014..a85a97a3b 100644 --- a/nuttx/arch/arm/src/armv6-m/Toolchain.defs +++ b/nuttx/arch/arm/src/armv6-m/Toolchain.defs @@ -66,9 +66,6 @@ endif ifeq ($(filter y, $(CONFIG_ARMV6M_TOOLCHAIN_GNU_EABI)),y) CONFIG_ARMV6M_TOOLCHAIN ?= GNU_EABI endif -ifeq ($(filter y, $(CONFIG_ARMV6M_TOOLCHAIN_RAISONANCE)),y) - CONFIG_ARMV6M_TOOLCHAIN ?= RAISONANCE -endif # # Supported toolchains @@ -102,16 +99,10 @@ endif # NuttX buildroot under Linux or Cygwin ifeq ($(CONFIG_ARMV6M_TOOLCHAIN),BUILDROOT) -ifeq ($(CONFIG_ARMV6M_OABI_TOOLCHAIN),y) - CROSSDEV ?= arm-nuttx-elf- - ARCROSSDEV ?= arm-nuttx-elf- - ARCHCPUFLAGS = -mtune=cortex-m0 -march=armv6-m -mfloat-abi=soft -else CROSSDEV ?= arm-nuttx-eabi- ARCROSSDEV ?= arm-nuttx-eabi- ARCHCPUFLAGS = -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -endif -MAXOPTIMIZATION = -Os + MAXOPTIMIZATION = -Os endif # Code Red RedSuite under Linux @@ -172,14 +163,3 @@ ifeq ($(CONFIG_ARMV6M_TOOLCHAIN),GNU_EABI) MAXOPTIMIZATION = -O3 ARCHCPUFLAGS = -mcpu=cortex_m0 -mthumb -march=armv6e-m -mfloat-abi=soft endif - -# Raisonance RIDE7 under Windows - -ifeq ($(CONFIG_ARMV6M_TOOLCHAIN),RAISONANCE) - CROSSDEV ?= arm-none-eabi- - ARCROSSDEV ?= arm-none-eabi- - ifneq ($(CONFIG_WINDOWS_NATIVE),y) - WINTOOL = y - endif - ARCHCPUFLAGS = -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -endif diff --git a/nuttx/arch/arm/src/nuc1xx/chip/nuc_config.h b/nuttx/arch/arm/src/nuc1xx/chip/nuc_config.h index 24f394bd2..cfc15bae9 100644 --- a/nuttx/arch/arm/src/nuc1xx/chip/nuc_config.h +++ b/nuttx/arch/arm/src/nuc1xx/chip/nuc_config.h @@ -1,5 +1,5 @@ /******************************************************************************************** - * arch/arm/src/nuc1xx/chip/nuc_adc.h + * arch/arm/src/nuc1xx/chip/nuc_config.h * * Copyright (C) 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> @@ -33,8 +33,8 @@ * ********************************************************************************************/ -#ifndef __ARCH_ARM_SRC_NUC1XX_CHIP_NUC_ADC_H -#define __ARCH_ARM_SRC_NUC1XX_CHIP_NUC_ADC_H +#ifndef __ARCH_ARM_SRC_NUC1XX_CHIP_NUC_CONFIG_H +#define __ARCH_ARM_SRC_NUC1XX_CHIP_NUC_CONFIG_H /******************************************************************************************** * Included Files @@ -114,4 +114,4 @@ * Public Functions ********************************************************************************************/ -#endif /* __ARCH_ARM_SRC_NUC1XX_CHIP_NUC_ADC_H */ +#endif /* __ARCH_ARM_SRC_NUC1XX_CHIP_NUC_CONFIG_H */ diff --git a/nuttx/configs/nutiny-nuc120/README.txt b/nuttx/configs/nutiny-nuc120/README.txt index 5e486e480..3f1e84df9 100644 --- a/nuttx/configs/nutiny-nuc120/README.txt +++ b/nuttx/configs/nutiny-nuc120/README.txt @@ -10,6 +10,7 @@ Contents - Development Environment - GNU Toolchain Options + - NuttX Buildroot Toolchain - LEDs - Serial Console - Debugging @@ -26,7 +27,47 @@ Development Environment GNU Toolchain Options ===================== - As of this writing I have used only the CodeSourcery GCC toolchain for windows. + As of this writing, all testing has been performed using the NuttX buildroot + toolchain described below. I have also verified the build using the + CodeSourcery GCC toolchain for windows. Most any contemporary EABI GCC + toolchain should work will a little tinkering. + +NuttX Buildroot Toolchain +========================= + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the Cortex-M3 GCC toolchain (if + different from the default in your PATH variable). + + If you have no Cortex-M0 toolchain, one can be downloaded from the NuttX + SourceForge download site (https://sourceforge.net/projects/nuttx/files/buildroot/). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in <some-dir>/nuttx. + + cd tools + ./configure.sh nutiny-nuc120/<sub-dir> + + 2. Download the latest buildroot package into <some-dir> + + 3. unpack the buildroot tarball. The resulting directory may + have versioning information on it like buildroot-x.y.z. If so, + rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot. + + 4. cd <some-dir>/buildroot + + 5. cp configs/cortexm0-eabi-defconfig-4.6.3 .config + + 6. make oldconfig + + 7. make + + 8. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + See the file configs/README.txt in the buildroot source tree. That has more + details PLUS some special instructions that you will need to follow if you are + building a Cortex-M3 toolchain for Cygwin under Windows. LEDs ==== diff --git a/nuttx/configs/nutiny-nuc120/ostest/defconfig b/nuttx/configs/nutiny-nuc120/ostest/defconfig index 964155240..9141ea1f2 100644 --- a/nuttx/configs/nutiny-nuc120/ostest/defconfig +++ b/nuttx/configs/nutiny-nuc120/ostest/defconfig @@ -75,19 +75,16 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_LPC2378 is not set # CONFIG_ARCH_CHIP_LPC31XX is not set # CONFIG_ARCH_CHIP_LPC43XX is not set -# CONFIG_ARCH_CHIP_SAM3U is not set CONFIG_ARCH_CHIP_NUC1XX=y -CONFIG_ARCH_CHIP_NUC120LE3AN=y +# CONFIG_ARCH_CHIP_SAM3U is not set +# CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STR71X is not set CONFIG_ARCH_CORTEXM0=y CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="nuc1xx" -# CONFIG_ARMV6M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y -# CONFIG_ARMV6M_CMNVECTOR is not set -# CONFIG_ARCH_FPU is not set -CONFIG_ARCH_HAVE_MPU=y -# CONFIG_ARMV6M_MPU is not set +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARCH_HAVE_MPU is not set CONFIG_BOARD_LOOPSPERMSEC=6522 # CONFIG_ARCH_CALIBRATION is not set @@ -95,117 +92,41 @@ CONFIG_BOARD_LOOPSPERMSEC=6522 # ARMV6M Configuration Options # # CONFIG_ARMV6M_TOOLCHAIN_ATOLLIC is not set -# CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT is not set +CONFIG_ARMV6M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV6M_TOOLCHAIN_CODEREDW is not set -CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW=y +# CONFIG_ARMV6M_TOOLCHAIN_CODESOURCERYW is not set # CONFIG_ARMV6M_TOOLCHAIN_DEVKITARM is not set # CONFIG_ARMV6M_TOOLCHAIN_GNU_EABI is not set -# CONFIG_ARMV6M_TOOLCHAIN_RAISONANCE is not set -# CONFIG_SERIAL_TERMIOS is not set - -# -# STM32 Configuration Options -# -# CONFIG_ARCH_CHIP_STM32F100C8 is not set -# CONFIG_ARCH_CHIP_STM32F100CB is not set -# CONFIG_ARCH_CHIP_STM32F100R8 is not set -# CONFIG_ARCH_CHIP_STM32F100RB is not set -# CONFIG_ARCH_CHIP_STM32F100RC is not set -# CONFIG_ARCH_CHIP_STM32F100RD is not set -# CONFIG_ARCH_CHIP_STM32F100RE is not set -# CONFIG_ARCH_CHIP_STM32F100V8 is not set -# CONFIG_ARCH_CHIP_STM32F100VB is not set -# CONFIG_ARCH_CHIP_STM32F100VC is not set -# CONFIG_ARCH_CHIP_STM32F100VD is not set -# CONFIG_ARCH_CHIP_STM32F100VE is not set -# CONFIG_ARCH_CHIP_STM32F103RET6 is not set -# CONFIG_ARCH_CHIP_STM32F103VCT6 is not set -# CONFIG_ARCH_CHIP_STM32F103VET6 is not set -# CONFIG_ARCH_CHIP_STM32F103ZET6 is not set -# CONFIG_ARCH_CHIP_STM32F105VBT7 is not set -# CONFIG_ARCH_CHIP_STM32F107VC is not set -# CONFIG_ARCH_CHIP_STM32F207IG is not set -# CONFIG_ARCH_CHIP_STM32F302CB is not set -# CONFIG_ARCH_CHIP_STM32F302CC is not set -# CONFIG_ARCH_CHIP_STM32F302RB is not set -# CONFIG_ARCH_CHIP_STM32F302RC is not set -# CONFIG_ARCH_CHIP_STM32F302VB is not set -# CONFIG_ARCH_CHIP_STM32F302VC is not set -# CONFIG_ARCH_CHIP_STM32F303CB is not set -# CONFIG_ARCH_CHIP_STM32F303CC is not set -# CONFIG_ARCH_CHIP_STM32F303RB is not set -# CONFIG_ARCH_CHIP_STM32F303RC is not set -# CONFIG_ARCH_CHIP_STM32F303VB is not set -CONFIG_ARCH_CHIP_NUC120=y -# CONFIG_ARCH_CHIP_STM32F405RG is not set -# CONFIG_ARCH_CHIP_STM32F405VG is not set -# CONFIG_ARCH_CHIP_STM32F405ZG is not set -# CONFIG_ARCH_CHIP_STM32F407VE is not set -# CONFIG_ARCH_CHIP_STM32F407VG is not set -# CONFIG_ARCH_CHIP_STM32F407ZE is not set -# CONFIG_ARCH_CHIP_STM32F407ZG is not set -# CONFIG_ARCH_CHIP_STM32F407IE is not set -# CONFIG_ARCH_CHIP_STM32F407IG is not set -CONFIG_STM32_NUC1XX=y -# CONFIG_STM32_DFU is not set - -# -# STM32 Peripheral Support -# -# CONFIG_STM32_ADC1 is not set -# CONFIG_STM32_ADC2 is not set -# CONFIG_STM32_ADC3 is not set -# CONFIG_STM32_ADC4 is not set -# CONFIG_STM32_CAN1 is not set -# CONFIG_STM32_CRC is not set -# CONFIG_STM32_DMA1 is not set -# CONFIG_STM32_DMA2 is not set -# CONFIG_STM32_DAC1 is not set -# CONFIG_STM32_DAC2 is not set -# CONFIG_STM32_I2C1 is not set -# CONFIG_STM32_I2C2 is not set -# CONFIG_STM32_IWDG is not set -# CONFIG_STM32_PWR is not set -# CONFIG_STM32_SDIO is not set -# CONFIG_STM32_SPI1 is not set -# CONFIG_STM32_SPI2 is not set -CONFIG_STM32_SYSCFG=y -# CONFIG_STM32_TIM1 is not set -# CONFIG_STM32_TIM2 is not set -# CONFIG_STM32_TIM3 is not set -# CONFIG_STM32_TIM4 is not set -# CONFIG_STM32_TIM6 is not set -# CONFIG_STM32_TIM7 is not set -# CONFIG_STM32_TIM8 is not set -# CONFIG_STM32_TIM15 is not set -# CONFIG_STM32_TIM16 is not set -# CONFIG_STM32_TIM17 is not set -# CONFIG_STM32_TSC is not set -# CONFIG_STM32_USART1 is not set -CONFIG_STM32_USART2=y -# CONFIG_STM32_USB is not set -# CONFIG_STM32_WWDG is not set - -# -# Alternate Pin Mapping -# -# CONFIG_STM32_JTAG_DISABLE is not set -# CONFIG_STM32_JTAG_FULL_ENABLE is not set -# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set -CONFIG_STM32_JTAG_SW_ENABLE=y -# CONFIG_STM32_FORCEPOWER is not set -# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set -CONFIG_STM32_USART=y - -# -# U[S]ART Configuration -# -# CONFIG_USART2_RS485 is not set -# CONFIG_STM32_USART_SINGLEWIRE is not set - -# -# USB Host Configuration + # +# NUC100/120 Configuration Options +# +# CONFIG_ARCH_CHIP_NUC100LC1BN is not set +# CONFIG_ARCH_CHIP_NUC100LD1BN is not set +# CONFIG_ARCH_CHIP_NUC100LD2BN is not set +# CONFIG_ARCH_CHIP_NUC100RC1BN is not set +# CONFIG_ARCH_CHIP_NUC100RD1BN is not set +# CONFIG_ARCH_CHIP_NUC100RD2BN is not set +# CONFIG_ARCH_CHIP_NUC100LD3AN is not set +# CONFIG_ARCH_CHIP_NUC100LE3AN is not set +# CONFIG_ARCH_CHIP_NUC100RD3AN is not set +# CONFIG_ARCH_CHIP_NUC100RE3AN is not set +# CONFIG_ARCH_CHIP_NUC100VD2AN is not set +# CONFIG_ARCH_CHIP_NUC100VD3AN is not set +# CONFIG_ARCH_CHIP_NUC100VE3AN is not set +# CONFIG_ARCH_CHIP_NUC120LC1BN is not set +# CONFIG_ARCH_CHIP_NUC120LD1BN is not set +# CONFIG_ARCH_CHIP_NUC120LD2BN is not set +# CONFIG_ARCH_CHIP_NUC120RC1BN is not set +# CONFIG_ARCH_CHIP_NUC120RD1BN is not set +# CONFIG_ARCH_CHIP_NUC120RD2BN is not set +# CONFIG_ARCH_CHIP_NUC120LD3AN is not set +CONFIG_ARCH_CHIP_NUC120LE3AN=y +# CONFIG_ARCH_CHIP_NUC120RD3AN is not set +# CONFIG_ARCH_CHIP_NUC120RE3AN is not set +# CONFIG_ARCH_CHIP_NUC120VD2AN is not set +# CONFIG_ARCH_CHIP_NUC120VD3AN is not set +# CONFIG_ARCH_CHIP_NUC120VE3AN is not set # # External Memory Configuration @@ -254,9 +175,6 @@ CONFIG_ARCH_BOARD="nutiny-nuc120" # CONFIG_ARCH_HAVE_LEDS=y CONFIG_ARCH_LEDS=y -CONFIG_ARCH_HAVE_BUTTONS=y -# CONFIG_ARCH_BUTTONS is not set -CONFIG_ARCH_HAVE_IRQBUTTONS=y # # Board-Specific Options @@ -265,6 +183,7 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y # # RTOS Features # +# CONFIG_BOARD_INITIALIZE is not set CONFIG_MSEC_PER_TICK=10 CONFIG_RR_INTERVAL=200 # CONFIG_SCHED_INSTRUMENTATION is not set @@ -339,7 +258,6 @@ CONFIG_DEV_NULL=y # CONFIG_CAN is not set # CONFIG_PWM is not set # CONFIG_I2C is not set -CONFIG_ARCH_HAVE_I2CRESET=y # CONFIG_SPI is not set # CONFIG_RTC is not set # CONFIG_WATCHDOG is not set @@ -357,20 +275,6 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_USART2=y -CONFIG_MCU_SERIAL=y -CONFIG_USART2_SERIAL_CONSOLE=y -# CONFIG_NO_SERIAL_CONSOLE is not set - -# -# USART2 Configuration -# -CONFIG_USART2_RXBUFSIZE=128 -CONFIG_USART2_TXBUFSIZE=128 -CONFIG_USART2_BAUD=115200 -CONFIG_USART2_BITS=8 -CONFIG_USART2_PARITY=0 -CONFIG_USART2_2STOP=0 # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set # CONFIG_WIRELESS is not set @@ -478,7 +382,6 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # # CONFIG_EXAMPLES_BUTTONS is not set # CONFIG_EXAMPLES_CAN is not set -# CONFIG_EXAMPLES_CDCACM is not set # CONFIG_EXAMPLES_COMPOSITE is not set # CONFIG_EXAMPLES_DHCPD is not set # CONFIG_EXAMPLES_ELF is not set diff --git a/nuttx/configs/nutiny-nuc120/ostest/setenv.sh b/nuttx/configs/nutiny-nuc120/ostest/setenv.sh index c09c83003..ecd5a7735 100755 --- a/nuttx/configs/nutiny-nuc120/ostest/setenv.sh +++ b/nuttx/configs/nutiny-nuc120/ostest/setenv.sh @@ -55,7 +55,7 @@ fi # This is the Cygwin path to the location where I installed the CodeSourcery # toolchain under windows. You will also have to edit this if you install # the CodeSourcery toolchain in any other location -export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" # These are the Cygwin paths to the locations where I installed the Atollic # toolchain under windows. You will also have to edit this if you install @@ -67,7 +67,7 @@ export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ # This is the Cygwin path to the location where I build the buildroot # toolchain. -#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin" +export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin" # Add the path to the toolchain to the PATH varialble export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" diff --git a/nuttx/fs/fs_closedir.c b/nuttx/fs/fs_closedir.c index ba4f12961..cd499f539 100644 --- a/nuttx/fs/fs_closedir.c +++ b/nuttx/fs/fs_closedir.c @@ -76,7 +76,9 @@ int closedir(FAR DIR *dirp) { struct fs_dirent_s *idir = (struct fs_dirent_s *)dirp; +#ifndef CONFIG_DISABLE_MOUNTPOINT struct inode *inode; +#endif int ret; if (!idir || !idir->fd_root) @@ -89,13 +91,13 @@ int closedir(FAR DIR *dirp) * things wih different filesystems. */ +#ifndef CONFIG_DISABLE_MOUNTPOINT inode = idir->fd_root; /* The way that we handle the close operation depends on what kind of root * inode we have open. */ -#ifndef CONFIG_DISABLE_MOUNTPOINT if (INODE_IS_MOUNTPT(inode) && !DIRENT_ISPSEUDONODE(idir->fd_flags)) { /* The node is a file system mointpoint. Verify that the mountpoint |