diff options
| -rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/Make.defs | 8 | ||||
| -rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c | 21 | ||||
| -rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c | 171 |
3 files changed, 184 insertions, 16 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/Make.defs b/nuttx/arch/arm/src/lpc17xx/Make.defs index 55ad5662c..b5022316f 100755 --- a/nuttx/arch/arm/src/lpc17xx/Make.defs +++ b/nuttx/arch/arm/src/lpc17xx/Make.defs @@ -48,7 +48,7 @@ CMN_CSRCS = up_assert.c up_blocktask.c up_copystate.c up_createstack.c \ up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \ up_hardfault.c up_svcall.c -# Required SAM3U files +# Required LPC17xx files CHIP_ASRCS = CHIP_CSRCS = lpc17_gpio.c lpc17_start.c @@ -56,7 +56,11 @@ CHIP_CSRCS = lpc17_gpio.c lpc17_start.c # lpc17_irq.c lpc17_lowputc.c lpc17_gpio.c lpc17_serial.c \ # lpc17_start.c lpc17_timerisr.c -# Configuration-dependent SAM3U files +# Configuration-dependent LPC17xx files + +ifeq ($(CONFIG_DEBUG),y) +CHIP_CSRCS += lpc17_gpiodbg.c +endif ifeq ($(CONFIG_LPC17_DMA),y) CHIP_CSRCS += lpc17_dmac.c diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c index 2ee38de63..bc62a87ba 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_gpio.c @@ -73,8 +73,8 @@ */ #ifdef CONFIG_GPIO_IRQ -static uint32_t g_intedge0[2]; -static uint32_t g_intedge2[2]; +static uint64_t g_intedge0; +static uint64_t g_intedge2; #endif /**************************************************************************** @@ -278,35 +278,28 @@ static int lpc17_pullup(uint16_t cfgset, unsigned int port, unsigned int pin) #ifdef CONFIG_GPIO_IRQ static int lpc17_setintedge(unsigned int port, unsigned int pin, unsigned int value) { - const uint32_t *table; - uint32_t tabval; + const uint64_t *intedge; unsigned int shift; /* Which word to we use? */ if (port == 0) { - table = g_intedge0; + intedge = g_intedge0; } else if (port == 2) { - table = g_intedge2; + intedge = g_intedge2; } else { return; } - if (pin >= 16) - { - table++; - pin -= 16; - } - /* Set the requested value in the PINSEL register */ - *table &= ~(3 << shift); - *table |= (value << shift); + *intedge &= ~(3 << shift); + *intedge |= (value << shift); } #endif diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c b/nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c new file mode 100755 index 000000000..5ff6ab9dc --- /dev/null +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_gpiodbg.c @@ -0,0 +1,171 @@ +/**************************************************************************** + * arch/arm/src/lpc17xx/lpc17_gpiodbg.c + * + * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <stdint.h> +#include <stdbool.h> +#include <debug.h> +#include <arch/irq.h> + +#include "up_arch.h" +#include "chip.h" +#include "lpc17_gpio.h" +#include "lpc17_internal.h" + +#ifdef CONFIG_DEBUG + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lpc17_pinsel + * + * Description: + * Get the address of the PINSEL register corresponding to this port and + * pin number. + * + ****************************************************************************/ + +static uint32_t lpc17_pinsel(unsigned int port, unsigned int pin) +{ + if (pin < 16) + { + return g_lopinsel[port]; + } + else + { + return g_hipinsel[port]; + } +} + +/**************************************************************************** + * Name: lpc17_pinmode + * + * Description: + * Get the address of the PINMODE register corresponding to this port and + * pin number. + * + ****************************************************************************/ + +static uint32_t lpc17_pinmode(unsigned int port, unsigned int pin) +{ + if (pin < 16) + { + return g_lopinmode[port]; + } + else + { + return g_hipinmode[port]; + } +} + +/**************************************************************************** + * Global Functions + ****************************************************************************/ + +/**************************************************************************** + * Function: lpc17_dumpgpio + * + * Description: + * Dump all GPIO registers associated with the provided base address + * + ****************************************************************************/ + +int lpc17_dumpgpio(uint16_t pinset, const char *msg) +{ + irqstate_t flags; + uint32_t base; + uint32_t pinsel; + uint32_t pinmode; + unsigned int port; + unsigned int pin; + + /* Get the base address associated with the GPIO port */ + + port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; + pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT; + pinsel = lpc17_pinsel(port); + pinmode = lpc17_pinmode(port); + + /* The following requires exclusive access to the GPIO registers */ + + flags = irqsave(); + lldbg("GPIO%c pinset: %08x base: %08x -- %s\n", + port + '0', pinset, fiobase, msg); + + lldbg(" PINSEL[%08x]: %08x PINMODE[%08x]: %08x ODMODE[%08x]: %08x\n" + pinsel, pinsel ? getreg32(pinsel) : 0, + pinmode, pinmode ? getreg32(pinmode) : 0, + g_odmode[port], getreg32(g_odmode[port])); + + base = g_fiobase[port]; + lldbg(" FIODIR[%08x]: %08x FIOMASK[%08x]: %08x FIOPIN[%08x]: %08x\n" + base+LPC17_FIO_DIR_OFFSET, getreg32(base+LPC17_FIO_DIR_OFFSET), + base+LPC17_FIO_MASK_OFFSET, getreg32(base+LPC17_FIO_MASK_OFFSET), + base+LPC17_FIO_PIN_OFFSET, getreg32(base+LPC17_FIO_PIN_OFFSET)); + + base = g_intbase[port]; + lldbg(" IOINTSTATUS[%08x]: %08x INTSTATR[%08x]: %08x INSTATF[%08x]: %08x\n", + base+LPC17_GPIOINT_IOINTSTATUS_OFFSET, getreg32(base+LPC17_GPIOINT_IOINTSTATUS_OFFSET), + base+LPC17_GPIOINT_INTSTATR_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATR_OFFSET), + base+LPC17_GPIOINT_INTSTATF_OFFSET, getreg32(base+LPC17_GPIOINT_INTSTATF_OFFSET)); + lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n", + base+LPC17_GPIOINT_INTENR_OFFSET, getreg32(base+LPC17_GPIOINT_INTENR_OFFSET), + base+LPC17_GPIOINT_INTENF_OFFSET, getreg32(base+LPC17_GPIOINT_INTENF_OFFSET)); + irqrestore(flags); + return OK; +} +#endif /* CONFIG_DEBUG */ + + + |