diff options
Diffstat (limited to 'nuttx/arch/arm/include/nuc1xx')
| -rw-r--r-- | nuttx/arch/arm/include/nuc1xx/chip.h | 91 | ||||
| -rw-r--r-- | nuttx/arch/arm/include/nuc1xx/irq.h | 108 | ||||
| -rw-r--r-- | nuttx/arch/arm/include/nuc1xx/nuc120_irq.h | 115 |
3 files changed, 314 insertions, 0 deletions
diff --git a/nuttx/arch/arm/include/nuc1xx/chip.h b/nuttx/arch/arm/include/nuc1xx/chip.h new file mode 100644 index 000000000..3c4b29f1d --- /dev/null +++ b/nuttx/arch/arm/include/nuc1xx/chip.h @@ -0,0 +1,91 @@ +/************************************************************************************ + * arch/arm/include/nuc1xx/chip.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + + +#ifndef __ARCH_ARM_INCLUDE_NUC1XX_CHIP_H +#define __ARCH_ARM_INCLUDE_NUC1XX_CHIP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* NVIC priority levels *************************************************************/ +/* Each priority field holds a priority value, 0-3. The lower the value, the greater + * the priority of the corresponding interrupt. The processor implements only + * bits[7:6] of each field, bits[5:0] read as zero and ignore writes. + */ + +#define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:3] set is minimum priority */ +#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */ +#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ +#define NVIC_SYSH_PRIORITY_STEP 0x40 /* Five bits of interrupt priority used */ + +#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP) +#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_INCLUDE_NUC1XX_CHIP_H */ + diff --git a/nuttx/arch/arm/include/nuc1xx/irq.h b/nuttx/arch/arm/include/nuc1xx/irq.h new file mode 100644 index 000000000..fcea3e165 --- /dev/null +++ b/nuttx/arch/arm/include/nuc1xx/irq.h @@ -0,0 +1,108 @@ +/************************************************************************************ + * arch/arm/include/nuc1xx/irq.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly through + * nuttx/irq.h + */ + +#ifndef __ARCH_ARM_INCLUDE_NUC1XX_IRQ_H +#define __ARCH_ARM_INCLUDE_NUC1XX_IRQ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to + * bits in the NVIC. This does, however, waste several words of memory in the IRQ + * to handle mapping tables. + */ + +/* Processor Exceptions (vectors 0-15) */ + +#define NUC_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */ + /* Vector 0: Reset stack pointer value */ + /* Vector 1: Reset (not handler as an IRQ) */ +#define NUC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */ +#define NUC_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */ + /* Vector 4-10: Reserved */ +#define NUC_IRQ_SVCALL (11) /* Vector 11: SVC call */ + /* Vector 12-13: Reserved */ +#define NUC_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */ +#define NUC_IRQ_SYSTICK (15) /* Vector 15: System tick */ + +/* External interrupts (vectors >= 16). These definitions are chip-specific */ + +#define NUC_IRQ_INTERRUPT (16) + +#if defined(CONFIG_ARCH_CHIP_NUC120) +# include <arch/nuc1xx/nuc120_irq.h> +#else +# error "Unrecognized NUC chip" +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_INCLUDE_NUC1XX_IRQ_H */ + diff --git a/nuttx/arch/arm/include/nuc1xx/nuc120_irq.h b/nuttx/arch/arm/include/nuc1xx/nuc120_irq.h new file mode 100644 index 000000000..5dcd1606c --- /dev/null +++ b/nuttx/arch/arm/include/nuc1xx/nuc120_irq.h @@ -0,0 +1,115 @@ +/************************************************************************************ + * arch/arm/include/nuc1xx/nuc120_irq.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly through + * nuttx/irq.h + */ + +#ifndef __ARCH_ARM_INCLUDE_NUC1XX_NUC120_IRQ_H +#define __ARCH_ARM_INCLUDE_NUC1XX_NUC120_IRQ_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/* NUC120 IRQ numbers */ + +#define NUC_IRQ_BOD (16) /* Brown-out low voltage detected */ +#define NUC_IRQ_WDT (17) /* Watchdog Timer */ +#define NUC_IRQ_EINT0 (18) /* Eternal interrupt from PB.14 */ +#define NUC_IRQ_EINT1 (19) /* Eternal interrupt from PB.15 */ +#define NUC_IRQ_GPAB (20) /* Eternal interrupt from PA[15:0]/PB[13:0] */ +#define NUC_IRQ_GPCDE (21) /* Eternal interrupt from PC[15:0]/PD[15:0]/PE[15:0] */ +#define NUC_IRQ_PWMA (22) /* PWM0-3 */ +#define NUC_IRQ_PWMB (23) /* PWM4-7 */ +#define NUC_IRQ_TMR0 (24) /* Timer 0 */ +#define NUC_IRQ_TMR1 (25) /* Timer 1 */ +#define NUC_IRQ_TMR2 (26) /* Timer 2 */ +#define NUC_IRQ_TMR3 (27) /* Timer 3 */ +#define NUC_IRQ_UART02 (28) /* UART0-1 */ +#define NUC_IRQ_UART1 (29) /* UART1 */ +#define NUC_IRQ_SPI0 (30) /* SPI0 */ +#define NUC_IRQ_SPI1 (31) /* SPI1 */ +#define NUC_IRQ_SPI2 (32) /* SPI2 */ +#define NUC_IRQ_SPI3 (33) /* SPI3 */ +#define NUC_IRQ_I2C0 (34) /* I2C0 */ +#define NUC_IRQ_I2C1 (35) /* I2C1 */ + /* 36-38: Reserved */ +#define NUC_IRQ_USB (39) /* USB */ +#define NUC_IRQ_PS2 (40) /* PS/2 interrupt */ +#define NUC_IRQ_ACMP (41) /* Analog comparator interrupt for chip wake-up from + * power down state */ +#define NUC_IRQ_PDMA (42) /* PDMA */ +#define NUC_IRQ_I2S (43) /* I2S */ +#define NUC_IRQ_PWRWU (44) /* Clock controller interrupt for chip wake-up from + * power down state */ +#define NUC_IRQ_ADC (45) /* ADC */ + /* 46: Reserved */ +#define NUC_IRQ_RTC (47) /* Real time clock */ + +#define NR_IRQS (48) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_INCLUDE_NUC1XX_NUC120_IRQ_H */ + |