diff options
Diffstat (limited to 'nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c')
| -rw-r--r-- | nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c b/nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c index 4511e1b9e..3d33f61c8 100644 --- a/nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c +++ b/nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c @@ -100,7 +100,7 @@ void up_ramvec_initialize(void) /* The vector table must be aligned */ - DEBUGASSERT(((uintptr)g_ram_vectors & NVIC_VECTAB_ALIGN_MASK) == 0); + DEBUGASSERT(((uintptr)g_ram_vectors & ~NVIC_VECTAB_TBLOFF_MASK) == 0); /* Copy the ROM vector table at address zero to RAM vector table. * @@ -116,13 +116,9 @@ void up_ramvec_initialize(void) *dest++ = *src++; } - /* Now configure the NVIC to use the new vector table. The TBLBASE bit - * indicates that the vectors are in RAM. NOTE: These fields appear to - * differ among various ARMv7-M implementations. - */ + /* Now configure the NVIC to use the new vector table. */ - putreg32(((uint32_t)g_ram_vectors & NVIC_VECTAB_TBLOFF_MASK) | NVIC_VECTAB_TBLBASE, - NVIC_VECTAB); + putreg32((uint32_t)g_ram_vectors, NVIC_VECTAB); } #endif /* !CONFIG_ARCH_RAMVECTORS */ |