diff options
Diffstat (limited to 'nuttx/arch/arm/src/armv7-m')
-rw-r--r-- | nuttx/arch/arm/src/armv7-m/ram_vectors.h | 123 | ||||
-rw-r--r-- | nuttx/arch/arm/src/armv7-m/up_ramvec_attach.c | 125 | ||||
-rw-r--r-- | nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c | 124 |
3 files changed, 372 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/armv7-m/ram_vectors.h b/nuttx/arch/arm/src/armv7-m/ram_vectors.h new file mode 100644 index 000000000..4cbe42d8c --- /dev/null +++ b/nuttx/arch/arm/src/armv7-m/ram_vectors.h @@ -0,0 +1,123 @@ +/************************************************************************************ + * arch/arm/src/armv7-m/ram_vectors.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H +#define __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +/* If CONFIG_ARMV7M_CMNVECTOR is defined then the number of peripheral interrupts + * is provided in chip.h. + */ + +#include "chip.h" +#include "up_internal.h" + +#ifdef CONFIG_ARCH_RAMVECTORS + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* This logic currently only works if CONFIG_ARMV7M_CMNVECTOR is defined. That is + * because CONFIG_ARMV7M_CMNVECTOR is needed to induce chip.h into giving us the + * number of peripheral interrupts. "Oh want a tangled web we weave..." + */ + +#ifndef CONFIG_ARMV7M_CMNVECTOR +# error "This logic requires CONFIG_ARMV7M_CMNVECTOR" +#endif + +/* This, then is the size of the vector table (in 4-byte entries). This size + * includes the IDLE stack pointer which lies at the beginning of + * the table. + */ + +#define ARMV7M_VECTAB_SIZE (ARMV7M_PERIPHERAL_INTERRUPTS) + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide + * ARM-specific implementations of irq_initialize(), irq_attach(), and + * irq_dispatch. In this case, it is also assumed that the ARM vector + * table resides in RAM, has the the name up_ram_vectors, and has been + * properly positioned and aligned in memory by the linker script. + */ + +extern up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE] + __attribute__((section(".ram_vectors"))); + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/**************************************************************************** + * Name: up_ramvec_initialize + * + * Description: + * Copy vectors to RAM an configure the NVIC to use the RAM vectors. + * + ****************************************************************************/ + +void up_ramvec_initialize(void); + +/**************************************************************************** + * Name: exception_common + * + * Description: + * This is the default, common vector handling entrypoint. + * + ****************************************************************************/ + +void exception_common(void); + +/**************************************************************************** + * Name: up_ramvec_attach + * + * Description: + * Configure the ram vector table so that IRQ number 'irq' will be + * dipatched by hardware to 'vector' + * + ****************************************************************************/ + +int up_ramvec_attach(int irq, up_vector_t vector); + +#endif /* CONFIG_ARCH_RAMVECTORS */ +#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */ diff --git a/nuttx/arch/arm/src/armv7-m/up_ramvec_attach.c b/nuttx/arch/arm/src/armv7-m/up_ramvec_attach.c new file mode 100644 index 000000000..605886352 --- /dev/null +++ b/nuttx/arch/arm/src/armv7-m/up_ramvec_attach.c @@ -0,0 +1,125 @@ +/**************************************************************************** + * arch/arm/irq/up_ramvec_attach.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <nuttx/irq.h> +#include <nuttx/arch.h> + +#include "ram_vectors.h" + +#ifdef CONFIG_ARCH_RAMVECTORS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Type Declarations + ****************************************************************************/ + +/**************************************************************************** + * Global Variables + ****************************************************************************/ + +/**************************************************************************** + * Private Variables + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/* Common exception entrypoint */ + +void exception_common(void); + +/**************************************************************************** + * Name: up_ramvec_attach + * + * Description: + * Configure the ram vector table so that IRQ number 'irq' will be + * dipatched by hardware to 'vector' + * + ****************************************************************************/ + +int up_ramvec_attach(int irq, up_vector_t vector) +{ + int ret = ERROR; + + if ((unsigned)irq < ARMV7M_PERIPHERAL_INTERRUPTS) + { + irqstate_t flags; + + /* If the new vector is NULL, then the vector is being detached. In + * this case, disable the itnerrupt and direct any interrupts to the + * common exception handler. + */ + + flags = irqsave(); + if (vector == NULL) + { + /* Disable the interrupt if we can before detaching it. We might + * not be able to do this for all interrupts. + */ + + up_disable_irq(irq); + + /* Detaching the vector really means re-attaching it to the + * common exception handler. + */ + + vector = exception_common; + } + + /* Save the new vector in the vector table. */ + + g_ram_vectors[irq] = vector; + irqrestore(flags); + ret = OK; + } + + return ret; +} + +#endif /* !CONFIG_ARCH_RAMVECTORS */ diff --git a/nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c b/nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c new file mode 100644 index 000000000..8ad4920c9 --- /dev/null +++ b/nuttx/arch/arm/src/armv7-m/up_ramvec_initialize.c @@ -0,0 +1,124 @@ +/**************************************************************************** + * arm/arm/src/armv7-m/up_ramvec_initialize.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/arch.h> +#include <nuttx/irq.h> + +#include "nvic.h" +#include "ram_vectors.h" +#include "up_arch.h" +#include "up_internal.h" + +#ifdef CONFIG_ARCH_RAMVECTORS + +/**************************************************************************** + * Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Type Declarations + ****************************************************************************/ + +/**************************************************************************** + * Global Variables + ****************************************************************************/ + +/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide + * ARM-specific implementations of up_ramvec_initialize(), irq_attach(), and + * irq_dispatch. In this case, it is also assumed that the ARM vector + * table resides in RAM, has the the name up_ram_vectors, and has been + * properly positioned and aligned in memory by the linker script. + */ + +up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE] + __attribute__((section(".ram_vectors"))); + +/**************************************************************************** + * Private Variables + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_ramvec_initialize + * + * Description: + * Copy vectors to RAM an configure the NVIC to use the RAM vectors. + * + ****************************************************************************/ + +void up_ramvec_initialize(void) +{ + const up_vector_t *src; + up_vector_t *dest; + int i; + + /* The vector table must be aligned */ + + DEBUGASSERT(((uintptr)g_ram_vectors & 0x3f) == 0); + + /* Copy the ROM vector table at address zero to RAM vector table. + * + * This must be done BEFORE the MPU is enable if the MPU is being used to + * protect against NULL pointer references. + */ + + src = (const CODE up_vector_t *)0; + dest = g_ram_vectors; + + for (i = 0; i < ARMV7M_VECTAB_SIZE; i++) + { + *dest++ = *src++; + } + + /* Now configure the NVIC to use the new vector table. Bit 29 indicates + * that the vector table is in RAM. + */ + + putreg32((uint32_t)g_ram_vectors | (1 << 29), NVIC_VECTAB); +} + +#endif /* !CONFIG_ARCH_RAMVECTORS */ |