diff options
Diffstat (limited to 'nuttx/arch/arm/src/lpc43xx/chip/lpc43_rtc.h')
| -rw-r--r-- | nuttx/arch/arm/src/lpc43xx/chip/lpc43_rtc.h | 141 |
1 files changed, 141 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_rtc.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_rtc.h index ea9640a10..971349354 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_rtc.h +++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_rtc.h @@ -83,6 +83,79 @@ #define LPC43_RTC_AMON_OFFSET 0x0078 /* Alarm value for Months */ #define LPC43_RTC_AYEAR_OFFSET 0x007c /* Alarm value for Year */ +/* General Purpose Registers. + * + * In addition to the RTC registers, 64 general purpose registers are available + * to store data when the main power supply is switched off. The general purpose + * registers reside in the RTC power domain and can be battery powered. + */ + +#define LPC43_REGFILE_OFFSET(n) (0x0000 + ((n) << 2)) +#define LPC43_REGFILE0_OFFSET 0x0000 +#define LPC43_REGFILE1_OFFSET 0x0004 +#define LPC43_REGFILE2_OFFSET 0x0008 +#define LPC43_REGFILE3_OFFSET 0x000c +#define LPC43_REGFILE4_OFFSET 0x0010 +#define LPC43_REGFILE5_OFFSET 0x0014 +#define LPC43_REGFILE6_OFFSET 0x0018 +#define LPC43_REGFILE7_OFFSET 0x001c +#define LPC43_REGFILE8_OFFSET 0x0020 +#define LPC43_REGFILE9_OFFSET 0x0024 +#define LPC43_REGFILE10_OFFSET 0x0028 +#define LPC43_REGFILE11_OFFSET 0x002c +#define LPC43_REGFILE12_OFFSET 0x0030 +#define LPC43_REGFILE13_OFFSET 0x0034 +#define LPC43_REGFILE14_OFFSET 0x0038 +#define LPC43_REGFILE15_OFFSET 0x003c +#define LPC43_REGFILE16_OFFSET 0x0040 +#define LPC43_REGFILE17_OFFSET 0x0044 +#define LPC43_REGFILE18_OFFSET 0x0048 +#define LPC43_REGFILE19_OFFSET 0x004c +#define LPC43_REGFILE20_OFFSET 0x0050 +#define LPC43_REGFILE21_OFFSET 0x0054 +#define LPC43_REGFILE22_OFFSET 0x0058 +#define LPC43_REGFILE23_OFFSET 0x005c +#define LPC43_REGFILE24_OFFSET 0x0060 +#define LPC43_REGFILE25_OFFSET 0x0064 +#define LPC43_REGFILE26_OFFSET 0x0068 +#define LPC43_REGFILE27_OFFSET 0x006c +#define LPC43_REGFILE28_OFFSET 0x0070 +#define LPC43_REGFILE29_OFFSET 0x0074 +#define LPC43_REGFILE30_OFFSET 0x0078 +#define LPC43_REGFILE31_OFFSET 0x007c +#define LPC43_REGFILE32_OFFSET 0x0080 +#define LPC43_REGFILE33_OFFSET 0x0084 +#define LPC43_REGFILE34_OFFSET 0x0088 +#define LPC43_REGFILE35_OFFSET 0x008c +#define LPC43_REGFILE36_OFFSET 0x0090 +#define LPC43_REGFILE37_OFFSET 0x0094 +#define LPC43_REGFILE38_OFFSET 0x0098 +#define LPC43_REGFILE39_OFFSET 0x009c +#define LPC43_REGFILE40_OFFSET 0x00a0 +#define LPC43_REGFILE41_OFFSET 0x00a4 +#define LPC43_REGFILE42_OFFSET 0x00a8 +#define LPC43_REGFILE43_OFFSET 0x00ac +#define LPC43_REGFILE44_OFFSET 0x00b0 +#define LPC43_REGFILE45_OFFSET 0x00b4 +#define LPC43_REGFILE46_OFFSET 0x00b8 +#define LPC43_REGFILE47_OFFSET 0x00bc +#define LPC43_REGFILE48_OFFSET 0x00c0 +#define LPC43_REGFILE49_OFFSET 0x00c4 +#define LPC43_REGFILE50_OFFSET 0x00c8 +#define LPC43_REGFILE51_OFFSET 0x00cc +#define LPC43_REGFILE52_OFFSET 0x00d0 +#define LPC43_REGFILE53_OFFSET 0x00d4 +#define LPC43_REGFILE54_OFFSET 0x00d8 +#define LPC43_REGFILE55_OFFSET 0x00dc +#define LPC43_REGFILE56_OFFSET 0x00e0 +#define LPC43_REGFILE57_OFFSET 0x00e4 +#define LPC43_REGFILE58_OFFSET 0x00e8 +#define LPC43_REGFILE59_OFFSET 0x00ec +#define LPC43_REGFILE60_OFFSET 0x00f0 +#define LPC43_REGFILE61_OFFSET 0x00f4 +#define LPC43_REGFILE62_OFFSET 0x00f8 +#define LPC43_REGFILE63_OFFSET 0x00fc + /* Register addresses ***************************************************************/ /* Miscellaneous registers */ @@ -120,6 +193,74 @@ #define LPC43_RTC_AMON (LPC43_RTC_BASE+LPC43_RTC_AMON_OFFSET) #define LPC43_RTC_AYEAR (LPC43_RTC_BASE+LPC43_RTC_AYEAR_OFFSET) +/* General Purpose Registers */ + +#define LPC43_REGFILE(n) (LPC43_BACKUP_BASE+LPC43_REGFILE_OFFSET(n)) +#define LPC43_REGFILE0 (LPC43_BACKUP_BASE+LPC43_REGFILE0_OFFSET) +#define LPC43_REGFILE1 (LPC43_BACKUP_BASE+LPC43_REGFILE1_OFFSET) +#define LPC43_REGFILE2 (LPC43_BACKUP_BASE+LPC43_REGFILE2_OFFSET) +#define LPC43_REGFILE3 (LPC43_BACKUP_BASE+LPC43_REGFILE3_OFFSET) +#define LPC43_REGFILE4 (LPC43_BACKUP_BASE+LPC43_REGFILE4_OFFSET) +#define LPC43_REGFILE5 (LPC43_BACKUP_BASE+LPC43_REGFILE5_OFFSET) +#define LPC43_REGFILE6 (LPC43_BACKUP_BASE+LPC43_REGFILE6_OFFSET) +#define LPC43_REGFILE7 (LPC43_BACKUP_BASE+LPC43_REGFILE7_OFFSET) +#define LPC43_REGFILE8 (LPC43_BACKUP_BASE+LPC43_REGFILE8_OFFSET) +#define LPC43_REGFILE9 (LPC43_BACKUP_BASE+LPC43_REGFILE9_OFFSET) +#define LPC43_REGFILE10 (LPC43_BACKUP_BASE+LPC43_REGFILE10_OFFSET) +#define LPC43_REGFILE11 (LPC43_BACKUP_BASE+LPC43_REGFILE11_OFFSET) +#define LPC43_REGFILE12 (LPC43_BACKUP_BASE+LPC43_REGFILE12_OFFSET) +#define LPC43_REGFILE13 (LPC43_BACKUP_BASE+LPC43_REGFILE13_OFFSET) +#define LPC43_REGFILE14 (LPC43_BACKUP_BASE+LPC43_REGFILE14_OFFSET) +#define LPC43_REGFILE15 (LPC43_BACKUP_BASE+LPC43_REGFILE15_OFFSET) +#define LPC43_REGFILE16 (LPC43_BACKUP_BASE+LPC43_REGFILE16_OFFSET) +#define LPC43_REGFILE17 (LPC43_BACKUP_BASE+LPC43_REGFILE17_OFFSET) +#define LPC43_REGFILE18 (LPC43_BACKUP_BASE+LPC43_REGFILE18_OFFSET) +#define LPC43_REGFILE19 (LPC43_BACKUP_BASE+LPC43_REGFILE19_OFFSET) +#define LPC43_REGFILE20 (LPC43_BACKUP_BASE+LPC43_REGFILE20_OFFSET) +#define LPC43_REGFILE21 (LPC43_BACKUP_BASE+LPC43_REGFILE21_OFFSET) +#define LPC43_REGFILE22 (LPC43_BACKUP_BASE+LPC43_REGFILE22_OFFSET) +#define LPC43_REGFILE23 (LPC43_BACKUP_BASE+LPC43_REGFILE23_OFFSET) +#define LPC43_REGFILE24 (LPC43_BACKUP_BASE+LPC43_REGFILE24_OFFSET) +#define LPC43_REGFILE25 (LPC43_BACKUP_BASE+LPC43_REGFILE25_OFFSET) +#define LPC43_REGFILE26 (LPC43_BACKUP_BASE+LPC43_REGFILE26_OFFSET) +#define LPC43_REGFILE27 (LPC43_BACKUP_BASE+LPC43_REGFILE27_OFFSET) +#define LPC43_REGFILE28 (LPC43_BACKUP_BASE+LPC43_REGFILE28_OFFSET) +#define LPC43_REGFILE29 (LPC43_BACKUP_BASE+LPC43_REGFILE29_OFFSET) +#define LPC43_REGFILE30 (LPC43_BACKUP_BASE+LPC43_REGFILE30_OFFSET) +#define LPC43_REGFILE31 (LPC43_BACKUP_BASE+LPC43_REGFILE31_OFFSET) +#define LPC43_REGFILE32 (LPC43_BACKUP_BASE+LPC43_REGFILE32_OFFSET) +#define LPC43_REGFILE33 (LPC43_BACKUP_BASE+LPC43_REGFILE33_OFFSET) +#define LPC43_REGFILE34 (LPC43_BACKUP_BASE+LPC43_REGFILE34_OFFSET) +#define LPC43_REGFILE35 (LPC43_BACKUP_BASE+LPC43_REGFILE35_OFFSET) +#define LPC43_REGFILE36 (LPC43_BACKUP_BASE+LPC43_REGFILE36_OFFSET) +#define LPC43_REGFILE37 (LPC43_BACKUP_BASE+LPC43_REGFILE37_OFFSET) +#define LPC43_REGFILE38 (LPC43_BACKUP_BASE+LPC43_REGFILE38_OFFSET) +#define LPC43_REGFILE39 (LPC43_BACKUP_BASE+LPC43_REGFILE39_OFFSET) +#define LPC43_REGFILE40 (LPC43_BACKUP_BASE+LPC43_REGFILE40_OFFSET) +#define LPC43_REGFILE41 (LPC43_BACKUP_BASE+LPC43_REGFILE41_OFFSET) +#define LPC43_REGFILE42 (LPC43_BACKUP_BASE+LPC43_REGFILE42_OFFSET) +#define LPC43_REGFILE43 (LPC43_BACKUP_BASE+LPC43_REGFILE43_OFFSET) +#define LPC43_REGFILE44 (LPC43_BACKUP_BASE+LPC43_REGFILE44_OFFSET) +#define LPC43_REGFILE45 (LPC43_BACKUP_BASE+LPC43_REGFILE45_OFFSET) +#define LPC43_REGFILE46 (LPC43_BACKUP_BASE+LPC43_REGFILE46_OFFSET) +#define LPC43_REGFILE47 (LPC43_BACKUP_BASE+LPC43_REGFILE47_OFFSET) +#define LPC43_REGFILE48 (LPC43_BACKUP_BASE+LPC43_REGFILE48_OFFSET) +#define LPC43_REGFILE49 (LPC43_BACKUP_BASE+LPC43_REGFILE49_OFFSET) +#define LPC43_REGFILE50 (LPC43_BACKUP_BASE+LPC43_REGFILE50_OFFSET) +#define LPC43_REGFILE51 (LPC43_BACKUP_BASE+LPC43_REGFILE51_OFFSET) +#define LPC43_REGFILE52 (LPC43_BACKUP_BASE+LPC43_REGFILE52_OFFSET) +#define LPC43_REGFILE53 (LPC43_BACKUP_BASE+LPC43_REGFILE53_OFFSET) +#define LPC43_REGFILE54 (LPC43_BACKUP_BASE+LPC43_REGFILE54_OFFSET) +#define LPC43_REGFILE55 (LPC43_BACKUP_BASE+LPC43_REGFILE55_OFFSET) +#define LPC43_REGFILE56 (LPC43_BACKUP_BASE+LPC43_REGFILE56_OFFSET) +#define LPC43_REGFILE57 (LPC43_BACKUP_BASE+LPC43_REGFILE57_OFFSET) +#define LPC43_REGFILE58 (LPC43_BACKUP_BASE+LPC43_REGFILE58_OFFSET) +#define LPC43_REGFILE59 (LPC43_BACKUP_BASE+LPC43_REGFILE59_OFFSET) +#define LPC43_REGFILE60 (LPC43_BACKUP_BASE+LPC43_REGFILE60_OFFSET) +#define LPC43_REGFILE61 (LPC43_BACKUP_BASE+LPC43_REGFILE61_OFFSET) +#define LPC43_REGFILE62 (LPC43_BACKUP_BASE+LPC43_REGFILE62_OFFSET) +#define LPC43_REGFILE63 (LPC43_BACKUP_BASE+LPC43_REGFILE63_OFFSET) + /* Register bit definitions *********************************************************/ /* Miscellaneous registers */ /* Interrupt Location Register */ |