diff options
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_rcc.h')
| -rwxr-xr-x | nuttx/arch/arm/src/stm32/stm32_rcc.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_rcc.h b/nuttx/arch/arm/src/stm32/stm32_rcc.h index 21dd0efc5..a7227cd79 100755 --- a/nuttx/arch/arm/src/stm32/stm32_rcc.h +++ b/nuttx/arch/arm/src/stm32/stm32_rcc.h @@ -63,16 +63,16 @@ /* Register Addresses ***************************************************************/ -#define STM32_RCC_CR (STM32_RCC_OFFSET+STM32_RCC_CR_OFFSET) -#define STM32_RCC_CFGR (STM32_RCC_OFFSET+STM32_RCC_CFGR_OFFSET) -#define STM32_RCC_CIR (STM32_RCC_OFFSET+STM32_RCC_CIR_OFFSET) -#define STM32_RCC_APB2RSTR (STM32_RCC_OFFSET+STM32_RCC_APB2RSTR_OFFSET) -#define STM32_RCC_APB1RSTR (STM32_RCC_OFFSET+STM32_RCC_APB1RSTR_OFFSET) -#define STM32_RCC_AHBENR (STM32_RCC_OFFSET+STM32_RCC_AHBENR_OFFSET) -#define STM32_RCC_APB2ENR (STM32_RCC_OFFSET+STM32_RCC_APB2ENR_OFFSET) -#define STM32_RCC_APB1ENR (STM32_RCC_OFFSET+STM32_RCC_APB1ENR_OFFSET) -#define STM32_RCC_BDCR (STM32_RCC_OFFSET+STM32_RCC_BDCR_OFFSET) -#define STM32_RCC_CSR (STM32_RCC_OFFSET+STM32_RCC_CSR_OFFSET) +#define STM32_RCC_CR (STM32_RCC_BASE+STM32_RCC_CR_OFFSET) +#define STM32_RCC_CFGR (STM32_RCC_BASE+STM32_RCC_CFGR_OFFSET) +#define STM32_RCC_CIR (STM32_RCC_BASE+STM32_RCC_CIR_OFFSET) +#define STM32_RCC_APB2RSTR (STM32_RCC_BASE+STM32_RCC_APB2RSTR_OFFSET) +#define STM32_RCC_APB1RSTR (STM32_RCC_BASE+STM32_RCC_APB1RSTR_OFFSET) +#define STM32_RCC_AHBENR (STM32_RCC_BASE+STM32_RCC_AHBENR_OFFSET) +#define STM32_RCC_APB2ENR (STM32_RCC_BASE+STM32_RCC_APB2ENR_OFFSET) +#define STM32_RCC_APB1ENR (STM32_RCC_BASE+STM32_RCC_APB1ENR_OFFSET) +#define STM32_RCC_BDCR (STM32_RCC_BASE+STM32_RCC_BDCR_OFFSET) +#define STM32_RCC_CSR (STM32_RCC_BASE+STM32_RCC_CSR_OFFSET) /* Register Bitfield Definitions ****************************************************/ |