diff options
Diffstat (limited to 'nuttx/arch/arm/src/str71x/str71x_lowputc.c')
| -rw-r--r-- | nuttx/arch/arm/src/str71x/str71x_lowputc.c | 26 |
1 files changed, 3 insertions, 23 deletions
diff --git a/nuttx/arch/arm/src/str71x/str71x_lowputc.c b/nuttx/arch/arm/src/str71x/str71x_lowputc.c index 2c98f2059..d4f22bb11 100644 --- a/nuttx/arch/arm/src/str71x/str71x_lowputc.c +++ b/nuttx/arch/arm/src/str71x/str71x_lowputc.c @@ -42,7 +42,9 @@ #include "up_internal.h" #include "up_arch.h" + #include "chip.h" +#include "str71x_internal.h" /************************************************************************** * Private Definitions @@ -200,28 +202,6 @@ #define STR71X_UARTCR_VALUE (STR71X_UARTCR_MODE|STR71X_UARTCR_PARITY|STR71X_UARTCR_STOP|\ STR71X_UARTCR_RUN|STR71X_UARTCR_RXENABLE|STR71X_UARTCR_FIFOENABLE) -/* Calculate the value of PCLK1 from settings in board.h. - * - * Example: - * STR71X_RCCU_MAIN_OSC = 4MHz (not divided by 2) - * CLK2 = 4MHz - * PLL1OUT = 16 * CLK2 / 2 = 32MHz - * CLK3 = 32MHz - * RCLK = 32MHz - * PCLK1 = 32MHz / 1 = 32MHz - */ - -#ifdef STR71X_PLL1IN_DIV2 /* Input may be divided by 2 */ -# define CLK2 (STR71X_RCCU_MAIN_OSC/2) /* CLK2 is input to PLL1 */ -#else -# define CLK2 STR71X_RCCU_MAIN_OSC /* CLK2 is input to PLL1 */ -#endif - /* PLL1OUT derives from CLK2 */ -#define PLL1OUT (STR71X_PLL1OUT_MUL * CLK2 / STR71X_PLL1OUT_DIV) -#define CLK3 PLL1OUT /* CLK3 hard coded to be PLL1OUT */ -#define RCLK CLK3 /* RCLK hard coded to be CLK3 */ -#define PCLK1 (RCLK / STR71X_APB1_DIV) /* PCLK1 derives from RCLK */ - /* Calculate BAUD rate from PCLK1: * * Example: @@ -232,7 +212,7 @@ */ #define UART_BAUDDIVISOR (16 * STR71X_UART_BAUD) -#define UART_BAUDRATE ((PCLK1 + (UART_BAUDDIVISOR/2) / UART_BAUDDIVISOR)) +#define UART_BAUDRATE ((STR71X_PCLK1 + (UART_BAUDDIVISOR/2) / UART_BAUDDIVISOR)) /************************************************************************** * Private Types |