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-rw-r--r--nuttx/arch/arm/src/stm32/stm32_serial.c25
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_spi.c33
-rw-r--r--nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c4
-rw-r--r--nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c4
4 files changed, 60 insertions, 6 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_serial.c b/nuttx/arch/arm/src/stm32/stm32_serial.c
index 01c519b39..265abfbf3 100644
--- a/nuttx/arch/arm/src/stm32/stm32_serial.c
+++ b/nuttx/arch/arm/src/stm32/stm32_serial.c
@@ -132,6 +132,30 @@
*/
# define RXDMA_BUFFER_SIZE 32
+
+/* DMA priority */
+
+# ifndef CONFIG_USART_DMAPRIO
+# if defined(CONFIG_STM32_STM32F10XX)
+# define CONFIG_USART_DMAPRIO DMA_CCR_PRIMED
+# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+# define CONFIG_USART_DMAPRIO DMA_SCR_PRIMED
+# else
+# error "Unknown STM32 DMA"
+# endif
+# endif
+# if defined(CONFIG_STM32_STM32F10XX)
+# if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
+# error "Illegal value for CONFIG_USART_DMAPRIO"
+# endif
+# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+# if (CONFIG_USART_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
+# error "Illegal value for CONFIG_USART_DMAPRIO"
+# endif
+# else
+# error "Unknown STM32 DMA"
+# endif
+
#endif
/* Power management definitions */
@@ -975,6 +999,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
DMA_SCR_MINC |
DMA_SCR_PSIZE_8BITS |
DMA_SCR_MSIZE_8BITS |
+ CONFIG_USART_DMAPRIO |
DMA_SCR_PBURST_SINGLE |
DMA_SCR_MBURST_SINGLE);
diff --git a/nuttx/arch/arm/src/stm32/stm32_spi.c b/nuttx/arch/arm/src/stm32/stm32_spi.c
index 7fdd988cb..06a994524 100644
--- a/nuttx/arch/arm/src/stm32/stm32_spi.c
+++ b/nuttx/arch/arm/src/stm32/stm32_spi.c
@@ -88,18 +88,47 @@
* Definitions
************************************************************************************/
/* Configuration ********************************************************************/
+/* SPI interrupts */
#ifdef CONFIG_STM32_SPI_INTERRUPTS
# error "Interrupt driven SPI not yet supported"
#endif
+/* Can't have both interrupt driven SPI and SPI DMA */
+
#if defined(CONFIG_STM32_SPI_INTERRUPTS) && defined(CONFIG_STM32_SPI_DMA)
# error "Cannot enable both interrupt mode and DMA mode for SPI"
#endif
-/* DMA channel configuration */
+/* SPI DMA priority */
+
+#ifdef CONFIG_STM32_SPI_DMA
+
+# if defined(CONFIG_SPI_DMAPRIO)
+# define SPI_DMA_PRIO CONFIG_SPI_DMAPRIO
+# elif defined(CONFIG_STM32_STM32F10XX)
+# define SPI_DMA_PRIO DMA_CCR_PRIMED
+# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+# define SPI_DMA_PRIO DMA_SCR_PRIMED
+# else
+# error "Unknown STM32 DMA"
+# endif
-#define SPI_DMA_PRIO DMA_CCR_PRIMED /* Check this to alter priority */
+# if defined(CONFIG_STM32_STM32F10XX)
+# if (SPI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0
+# error "Illegal value for CONFIG_SPI_DMAPRIO"
+# endif
+# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+# if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0
+# error "Illegal value for CONFIG_SPI_DMAPRIO"
+# endif
+# else
+# error "Unknown STM32 DMA"
+# endif
+
+#endif
+
+/* DMA channel configuration */
#define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC )
#define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC )
diff --git a/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c b/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c
index 7e3ece2fa..e69f6d329 100644
--- a/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c
+++ b/nuttx/arch/arm/src/stm32/stm32f20xxx_dma.c
@@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET);
regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
- DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|
+ DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK|
DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
- DMA_SCR_DBM|DMA_SCR_CIRC|
+ DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK|
DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
regval |= scr;
dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0;
diff --git a/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c b/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c
index c3555d714..dce340ff9 100644
--- a/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c
+++ b/nuttx/arch/arm/src/stm32/stm32f40xxx_dma.c
@@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET);
regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
- DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|
+ DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK|
DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
- DMA_SCR_DBM|DMA_SCR_CIRC|
+ DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK|
DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
regval |= scr;
dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0;