diff options
Diffstat (limited to 'nuttx/configs/hymini-stm32v/include/board.h')
| -rw-r--r-- | nuttx/configs/hymini-stm32v/include/board.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/nuttx/configs/hymini-stm32v/include/board.h b/nuttx/configs/hymini-stm32v/include/board.h index 0e7427f6c..963ba037d 100644 --- a/nuttx/configs/hymini-stm32v/include/board.h +++ b/nuttx/configs/hymini-stm32v/include/board.h @@ -112,20 +112,20 @@ #define STM32_CFGR_USBPRE 0 /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx - * otherwise frequency is 2xAPBx. + * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ #define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY #define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY -/* SDIO dividers. Note that slower clocking is required when DMA is disabled +/* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses * to service FIFOs in interrupt driven mode. These values have not been * tuned!!! * * HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz */ - + #define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT) /* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz @@ -133,9 +133,9 @@ */ #ifdef CONFIG_SDIO_DMA -# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) +# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT) #else -# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) +# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT) #endif /* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz |