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-rw-r--r--nuttx/arch/arm/src/stm32/chip/stm32_adc.h28
-rw-r--r--nuttx/configs/stm3210e-eval/src/Makefile4
-rw-r--r--nuttx/configs/stm3210e-eval/src/up_adc.c111
-rw-r--r--nuttx/configs/stm3240g-eval/src/Makefile4
-rw-r--r--nuttx/configs/stm3240g-eval/src/up_adc.c111
5 files changed, 244 insertions, 14 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_adc.h b/nuttx/arch/arm/src/stm32/chip/stm32_adc.h
index 5893ae625..999aeffaa 100644
--- a/nuttx/arch/arm/src/stm32/chip/stm32_adc.h
+++ b/nuttx/arch/arm/src/stm32/chip/stm32_adc.h
@@ -401,7 +401,7 @@
/* ADC watchdog low threshold register */
-#define ADC_LTR_SHIFT (0) /* Bits 11:0: Analog watchdog low threshold */
+#define ADC_LTR_SHIFT (0) /* Bits 11-0: Analog watchdog low threshold */
#define ADC_LTR_MASK (0x0fff << ADC_LTR_SHIFT)
/* ADC regular sequence register 1 */
@@ -414,12 +414,12 @@
#define ADC_SQR1_SQ15_MASK (0x1f << ADC_SQR1_SQ15_SHIFT)
#define ADC_SQR1_SQ16_SHIFT (15) /* Bits 19-15: 16th conversion in regular sequence */
#define ADC_SQR1_SQ16_MASK (0x1f << ADC_SQR1_SQ16_SHIFT)
-#define ADC_SQR1_L_SHIFT (20) /* Bits 23:20 L[3:0]: Regular channel sequence length */
+#define ADC_SQR1_L_SHIFT (20) /* Bits 23-20: Regular channel sequence length */
#define ADC_SQR1_L_MASK (0x0f << ADC_SQR1_L_SHIFT)
/* ADC regular sequence register 2 */
-#define ADC_SQR1_SQ7_SHIFT (0) /* Bits 4-0: 7th conversion in regular sequence */
+#define ADC_SQR2_SQ7_SHIFT (0) /* Bits 4-0: 7th conversion in regular sequence */
#define ADC_SQR2_SQ7_MASK (0x1f << ADC_SQR2_SQ7_SHIFT)
#define ADC_SQR2_SQ8_SHIFT (5) /* Bits 9-5: 8th conversion in regular sequence */
#define ADC_SQR2_SQ8_MASK (0x1f << ADC_SQR2_SQ8_SHIFT)
@@ -427,9 +427,9 @@
#define ADC_SQR2_SQ9_MASK (0x1f << ADC_SQR2_SQ9_SHIFT)
#define ADC_SQR2_SQ10_SHIFT (15) /* Bits 19-15: 10th conversion in regular sequence */
#define ADC_SQR2_SQ10_MASK (0x1f << ADC_SQR2_SQ10_SHIFT)
-#define ADC_SQR2_SQ11_SHIFT (20) /* Bits 24:20: 11th conversion in regular sequence */
+#define ADC_SQR2_SQ11_SHIFT (20) /* Bits 24-20: 11th conversion in regular sequence */
#define ADC_SQR2_SQ11_MASK (0x1f << ADC_SQR2_SQ11_SHIFT )
-#define ADC_SQR2_SQ12_SHIFT (25) /* Bits 29:25: 12th conversion in regular sequence */
+#define ADC_SQR2_SQ12_SHIFT (25) /* Bits 29-25: 12th conversion in regular sequence */
#define ADC_SQR2_SQ12_MASK (0x1f << ADC_SQR2_SQ12_SHIFT)
/* ADC regular sequence register 3 */
@@ -442,22 +442,22 @@
#define ADC_SQR3_SQ3_MASK (0x1f << ADC_SQR3_SQ3_SHIFT)
#define ADC_SQR3_SQ4_SHIFT (15) /* Bits 19-15: 4th conversion in regular sequence */
#define ADC_SQR3_SQ4_MASK (0x1f << ADC_SQR3_SQ4_SHIFT)
-#define ADC_SQR3_SQ5_SHIFT (20) /* Bits 24:20: 5th conversion in regular sequence */
+#define ADC_SQR3_SQ5_SHIFT (20) /* Bits 24-20: 5th conversion in regular sequence */
#define ADC_SQR3_SQ5_MASK (0x1f << ADC_SQR3_SQ5_SHIFT )
-#define ADC_SQR3_SQ6_SHIFT (25) /* Bits 29:25: 6th conversion in regular sequence */
+#define ADC_SQR3_SQ6_SHIFT (25) /* Bits 29-25: 6th conversion in regular sequence */
#define ADC_SQR3_SQ6_MASK (0x1f << ADC_SQR3_SQ6_SHIFT)
/* ADC injected sequence register */
-#define ADC_JSQR_JSQ1_SHIFT (0) /* Bits 4:0 JSQ1[4:0]: 1st conversion in injected sequence */
+#define ADC_JSQR_JSQ1_SHIFT (0) /* Bits 4-0: 1st conversion in injected sequence */
#define ADC_JSQR_JSQ1_MASK (0x1f << ADC_JSQR_JSQ1_SHIFT)
-#define ADC_JSQR_JSQ2_SHIFT (5) /* Bits 9:5 JSQ2[4:0]: 2nd conversion in injected sequence */
+#define ADC_JSQR_JSQ2_SHIFT (5) /* Bits 9-5: 2nd conversion in injected sequence */
#define ADC_JSQR_JSQ2_MASK (0x1f << ADC_JSQR_JSQ2_MASK)
-#define ADC_JSQR_JSQ3_SHIFT (10) /* Bits 14:10 JSQ3[4:0]: 3rd conversion in injected sequence */
+#define ADC_JSQR_JSQ3_SHIFT (10) /* Bits 14-10: 3rd conversion in injected sequence */
#define ADC_JSQR_JSQ3_MASK (0x1f << ADC_JSQR_JSQ3_SHIFT)
-#define ADC_JSQR_JSQ4_SHIFT (15) /* Bits 19:15 JSQ4[4:0]: 4th conversion in injected sequence */
+#define ADC_JSQR_JSQ4_SHIFT (15) /* Bits 19-15: 4th conversion in injected sequence */
#define ADC_JSQR_JSQ4_MASK (0x1f << ADC_JSQR_JSQ4_SHIFT)
-#define ADC_JSQR_JL_SHIFT (20) /* Bits 21:20 JL[1:0]: Injected Sequence length */
+#define ADC_JSQR_JL_SHIFT (20) /* Bits 21-20: Injected Sequence length */
#define ADC_JSQR_JL_MASK (3 << ADC_JSQR_JL_SHIFT)
/* ADC injected data register 1-4 */
@@ -467,9 +467,9 @@
/* ADC regular data register */
-#define ADC_DR_DATA_SHIFT (0) /* Bits 15:0 Regular data */
+#define ADC_DR_DATA_SHIFT (0) /* Bits 15-0 Regular data */
#define ADC_DR_DATA_MASK (0xffff << ADC_DR_DATA_SHIFT)
-#define ADC_DR_ADC2DATA_SHIFT (16) /* Bits 31:16: ADC2 data */
+#define ADC_DR_ADC2DATA_SHIFT (16) /* Bits 31-16: ADC2 data */
#define ADC_DR_ADC2DATA_MASK (0xffff << ADC_DR_ADC2DATA_SHIFT)
/* Common status register */
diff --git a/nuttx/configs/stm3210e-eval/src/Makefile b/nuttx/configs/stm3210e-eval/src/Makefile
index f4177d760..e949e7208 100644
--- a/nuttx/configs/stm3210e-eval/src/Makefile
+++ b/nuttx/configs/stm3210e-eval/src/Makefile
@@ -52,6 +52,10 @@ ifeq ($(CONFIG_NSH_ARCHINIT),y)
CSRCS += up_nsh.c
endif
+ifeq ($(CONFIG_ADC),y)
+CSRCS += up_adc.c
+endif
+
ifeq ($(CONFIG_USBSTRG),y)
CSRCS += up_usbstrg.c
endif
diff --git a/nuttx/configs/stm3210e-eval/src/up_adc.c b/nuttx/configs/stm3210e-eval/src/up_adc.c
new file mode 100644
index 000000000..c2a0d2cfe
--- /dev/null
+++ b/nuttx/configs/stm3210e-eval/src/up_adc.c
@@ -0,0 +1,111 @@
+/************************************************************************************
+ * configs/stm3210e-eval/src/up_adc.c
+ * arch/arm/src/board/up_adc.c
+ *
+ * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/analog/adc.h>
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm3210e-internal.h"
+
+#ifdef CONFIG_ADC
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Configuration ************************************************************/
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32_NADC < 3
+# undef CONFIG_STM32_ADC3
+#endif
+
+#if STM32_NADC < 2
+# undef CONFIG_STM32_ADC2
+#endif
+
+#if STM32_NADC < 1
+# undef CONFIG_STM32_ADC1
+#endif
+
+#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ * All STM32 architectures must provide the following entry point. This entry point
+ * is called early in the intitialization -- after all memory has been configured
+ * and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void adc_devinit(void)
+{
+ struct adc_dev_s *adc;
+ int ret;
+
+ /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+#warning "Missing Logic"
+
+ /* Register the ADC driver at "/dev/adc0" */
+
+ ret = adc_register("/dev/adc0", adc);
+ if (ret < 0)
+ {
+ adbg("adc_register failed: %d\n", ret);
+ }
+}
+
+#endif /* CONFIG_STM32_ADC || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
+#endif /* CONFIG_ADC */ \ No newline at end of file
diff --git a/nuttx/configs/stm3240g-eval/src/Makefile b/nuttx/configs/stm3240g-eval/src/Makefile
index 0d2067b16..2ba46d682 100644
--- a/nuttx/configs/stm3240g-eval/src/Makefile
+++ b/nuttx/configs/stm3240g-eval/src/Makefile
@@ -42,6 +42,10 @@ AOBJS = $(ASRCS:.S=$(OBJEXT))
CSRCS = up_boot.c up_leds.c up_buttons.c up_spi.c
+ifeq ($(CONFIG_ADC),y)
+CSRCS += up_adc.c
+endif
+
COBJS = $(CSRCS:.c=$(OBJEXT))
SRCS = $(ASRCS) $(CSRCS)
diff --git a/nuttx/configs/stm3240g-eval/src/up_adc.c b/nuttx/configs/stm3240g-eval/src/up_adc.c
new file mode 100644
index 000000000..278d830ee
--- /dev/null
+++ b/nuttx/configs/stm3240g-eval/src/up_adc.c
@@ -0,0 +1,111 @@
+/************************************************************************************
+ * configs/stm3240g-eval/src/up_adc.c
+ * arch/arm/src/board/up_adc.c
+ *
+ * Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/analog/adc.h>
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm3240g-internal.h"
+
+#ifdef CONFIG_ADC
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Configuration ************************************************************/
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32_NADC < 3
+# undef CONFIG_STM32_ADC3
+#endif
+
+#if STM32_NADC < 2
+# undef CONFIG_STM32_ADC2
+#endif
+
+#if STM32_NADC < 1
+# undef CONFIG_STM32_ADC1
+#endif
+
+#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ * All STM32 architectures must provide the following entry point. This entry point
+ * is called early in the intitialization -- after all memory has been configured
+ * and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void adc_devinit(void)
+{
+ struct adc_dev_s *adc;
+ int ret;
+
+ /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+#warning "Missing Logic"
+
+ /* Register the ADC driver at "/dev/adc0" */
+
+ ret = adc_register("/dev/adc0", adc);
+ if (ret < 0)
+ {
+ adbg("adc_register failed: %d\n", ret);
+ }
+}
+
+#endif /* CONFIG_STM32_ADC || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
+#endif /* CONFIG_ADC */ \ No newline at end of file
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-29 04:54:40 +0000