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* Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ↵patacongo2013-01-221-2/+41
| | | | | | ARMv7-M architectures git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
* Email address change in nuttx/patacongo2012-09-131-1/+1
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
* Add LPC43 interrrupt control logicpatacongo2012-07-041-6/+0
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4905 42af7a65-404d-4744-a932-0658087f49c3
* Add framework for a SAM3U SPI driverpatacongo2011-10-031-0/+0
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4010 42af7a65-404d-4744-a932-0658087f49c3
* Name change: Change Cortex-M3 naming to ARMv7-M naming so support Cortex-M4patacongo2011-08-051-2/+2
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3846 42af7a65-404d-4744-a932-0658087f49c3
* current_regs should be volatile; add support for nested interrupts; enable ↵patacongo2011-04-061-1/+1
| | | | | | interrupts during syscall processing git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3475 42af7a65-404d-4744-a932-0658087f49c3
* Attach mem mgmt fault handle if MPU is enabledpatacongo2011-04-061-13/+16
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3471 42af7a65-404d-4744-a932-0658087f49c3
* Misc fixes, add button support, GPIO interrupt supportpatacongo2010-01-231-3/+27
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2523 42af7a65-404d-4744-a932-0658087f49c3
* Add interrupt management logicpatacongo2010-01-031-0/+440
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2494 42af7a65-404d-4744-a932-0658087f49c3
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