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* Workaround for bad values read from the STM32_OTGFS_GRXSTSP register are ↵master_usb_fixDavid Sidrane2015-04-251-126/+134
| | | | 0xb4e48168 or 0xa80c9367 or 267E781c All of which provide out of range indexes for epout[epphy]
* Back port spi settings fix: SPE must be disabled before changing settingDavid Sidrane2015-02-171-4/+8
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* Fix SPI so that SPI4 Clock will not be 2 times requestedDavid Sidrane2015-02-131-3/+3
| | | | | | | | The clocks assigned to the SPI blocks spi4 to spi6 were using the APB1 prescaler (42 mHZ) constant and should have been the APB2 prescaler (84 mHZ) constant. Thus the actual SPI clock on the bus was 2 times what is should have been (After adjustment for requested to actual) IE: Request for 11 mHz maps to an Actual 10.5 mHz but would have produced a clock of 21 mHz on the bus. This change fixes that.
* backport SDIO Fix - no busy waitingDavid Sidrane2015-01-071-1/+78
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* stm32-rtc: Add support for the internal low speed clock (LSI)Kevin Hester2015-01-023-15/+52
| | | | | Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy internal RC clock. Turn on by defining CONFIG_RTC_LSICLOCK
* updating pinmap for mavstationkbrtny2014-11-261-0/+22
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* Added WIP F102 support for the MAvstationkbrtny2014-11-263-1/+270
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* stm32_i2c: handle more error conditions on I2C busAndrew Tridgell2014-10-281-0/+28
| | | | | | | this fixes a I2C ISR storm condition where status=0x70084, which can happen with some specific types of noise on the I2C bus. This was reproduced by playing 80s rock through a Jabra wireless headset close to the I2C cables.
* Add "#ifdef CONFIG_ARCH_IRQPRIO" where neededAnton Babushkin2014-08-144-0/+8
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* STM32: Handle setting of USART CR1_M when 8 bits of data plus parityGregory Nutt2014-07-231-19/+27
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* stm32_i2c: handle more unexpected ISR conditionsAndrew Tridgell2014-07-121-1/+11
| | | | | | | | this clears the interrupt for more unexpected ISR conditions that otherwise lead to an ISR storm. When that happens no user threads are able to run as the I2C ISR is continually raised Thanks to Lorenz for help in tracking this down
* stm32_i2c: check for msgc underflow in I2C ISRAndrew Tridgell2014-07-121-17/+24
| | | | | | a spurious I2C interrupt could cause priv->msgc to underflow, leading to memory being overwritten. This seems to have been the cause of at least some of lockups we have seen
* stm32_i2c: ensure we don't change priv-> after semaphore is releasedAndrew Tridgell2014-07-121-1/+2
| | | | | | | this prevents a race condition where a subsequent I2C transfer could be lost Many thanks to hxxnrx@gmail.com for reporting this bug
* stm32_i2c: fixed timeout handlingAndrew Tridgell2014-07-121-2/+2
| | | | thanks to hxxnrx@gmail.com for noticing this
* Revert "Revert "stm32_i2c: ensure that unexpected ISR can't overwrite stale ↵Lorenz Meier2014-07-121-1/+10
| | | | | | data"" This reverts commit 7a7a07ed0ec492b3ab9f87467189886a66b2fc1a.
* stm32: add sw workaround for broken stm32 hw RTS implementationKevin Hester2014-05-201-5/+97
| | | | | | | | | | | | | | adds support for manually asserting nRTS when the OS buffer is nearly full and deasserting it when it has room again. This makes the RTS pin actually work in a useful way (the stm32 hw implementation is broken - it asserts nRTS as soon as more than one character is received). We assert nRTS from inside of up_recvchars. For deassertion we needed a new callback from the general serial device layer when characters have been dequed. onrxdeque was added to uart_ops_s for this purpose and implemented (currently) only on the stm32.
* Revert "stm32_i2c: ensure that unexpected ISR can't overwrite stale data"Lorenz Meier2014-05-141-10/+1
| | | | | | This reverts commit 099b2017ccfa0fc7696f168db2a0c2e13fe5edbc. This is only a temporary measure to gain the time to apply a more complete fix without side effects.
* Merge pull request #8 from sarthakkaingade/masterLorenz Meier2014-05-071-1/+1
|\ | | | | Corrected pinmaps for stm32f40xxx processor
| * Merge https://github.com/PX4/NuttXSarthak Kaingade2014-02-241-23/+35
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| * | Corrected pinmaps for stm32f40xxx processorSarthak Kaingade2013-10-281-1/+1
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* | | stm32_i2c: ensure that unexpected ISR can't overwrite stale dataAndrew Tridgell2014-04-281-1/+10
| |/ |/| | | | | | | | | | | | | if we get an ISR leftover from a previous read transfer it could use stale values for priv->dcnt and priv->ptr to overwrite stack that is no longer in scope. This resets dcnt and ptr on each new stm32_i2c_process() call to ensure that any unexpected data bytes are discarded
* | stm32_serial: fixed spelling of FLOWCONTROL config option in stm32 serial codeAndrew Tridgell2014-02-101-20/+20
| | | | | | | | this fixes flow control on pixhawk
* | small whitespace correctionThomas Gubler2014-01-021-1/+2
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* | STM32F10xxx single wire usart supportThomas Gubler2014-01-021-2/+14
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* | Fixed location of DMA console reinitializationLorenz Meier2013-12-171-3/+2
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* Fix a typo that disconnected the DMA range validation checker from the ↵px4dev2013-09-291-1/+1
| | | | | | actual DMA path. Now SDIO DMA ranges are properly checked, and filesystem operations are correctly bounced when they cannot be DMA'ed.
* Add an explicit preflight call for SDIO DMA operations, since we can't error ↵px4dev2013-09-081-29/+46
| | | | out of the DMA setup (the card is already committed at that point).
* Fix DMA channel definitions for UART7/8px4dev2013-09-011-4/+4
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* Teach the STM32 SDIO driver how to determine whether a transfer can be ↵px4dev2013-09-011-47/+61
| | | | performed safely using DMA.
* Fix the Kconfig configuration for the STM32 SDIO DMA priority option.px4dev2013-09-011-0/+8
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* Enhance the stm32_dmacapable implementation to give correct answers.px4dev2013-09-014-10/+241
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* Fix STM32 UART7/8 kconfig names and UART DMA dependencies.px4dev2013-09-011-34/+34
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* STM32 BxCAN filter registers are only accessible via the CAN1 register ↵px4dev2013-08-112-39/+72
| | | | block; teach the code how to get at them.
* Add CAN configuration to STM32 config menuGregory Nutt2013-08-111-1/+15
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* Fixed serial init for non-reordering caseLorenz Meier2013-07-281-1/+8
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* Added option to disable serial port reorderingLorenz Meier2013-07-282-1/+22
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* HACK: don't call the card-changed callback with interrupts disabled, as it ↵Lorenz Meier2013-07-171-1/+2
| | | | means that timeouts don't work.
* Merged in upstream, took upstream UART driver without changes, needs ↵Lorenz Meier2013-06-132-39/+103
| | | | re-evaluation (minor diffs to local version)
* Merge branch 'hardware_flow_control' into integrationLorenz Meier2013-06-061-43/+125
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| * Merge branch 'upstream' into hardware_flow_controlLorenz Meier2013-06-0610-48/+233
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| * | Hardware flow control bitsLorenz Meier2013-06-021-43/+125
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* | | Cleanup on stack checkLorenz Meier2013-06-051-1/+1
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* | | Merged upstream NuttXLorenz Meier2013-06-057-45/+230
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| * | If CONFIG_STM32_DMACAPABLE is defined, use stm32_dmacapable to workaround ↵Gregory Nutt2013-06-041-19/+36
| | | | | | | | | | | | attempt SPI DMAs from the CCM stack
| * | Add stm32_dmacapable interface to determine is it is possible to perform DMA ↵Gregory Nutt2013-06-046-26/+170
| | | | | | | | | | | | from a given address.
| * | Add a skeleton configuration that will eventually support the SAM4L Xplained ↵Gregory Nutt2013-06-031-0/+24
| | | | | | | | | | | | Pro board
* | | Merge branch 'master' of http://git.code.sf.net/p/nuttx/git into integrationLorenz Meier2013-06-031-1/+1
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| * | Add missing NSH configuration settings. Correct some conditional logic for ↵Gregory Nutt2013-06-022-2/+2
| | | | | | | | | | | | STM32 FALSH pre-fetch settings. From Lorenz Meier
| * | Eliminated sam3u_internal.h. Use separate header files instead. More ↵Gregory Nutt2013-06-021-1/+1
| |/ | | | | | | renaming from sam3u_ to sam_ to make room in the namespce for the sam4l_
* | Merge branch 'stack_check' into integrationLorenz Meier2013-06-022-0/+20
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