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* Move clock functions from sched/ to sched/clockGregory Nutt2014-08-0820-20/+20
* Move interrupt dispatch logic from sched/ to sched/irqGregory Nutt2014-08-081-1/+1
* Change all time conversions. Yech. New timer units in microseconds breaks a...Gregory Nutt2014-08-0718-21/+21
* Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate ...Gregory Nutt2014-08-0640-104/+178
* SAMA5D3 HSMCI: TX DMA is again disabledGregory Nutt2014-08-051-1/+7
* SAMA5 PCK: Add Main clock as an option for the PCK clock sourceGregory Nutt2014-08-032-26/+37
* SAMA5 SSC: Verify that the requested bit width is supported. Correct some al...Gregory Nutt2014-08-021-13/+113
* SAMA5 WM8904: Fix errors in programmable clock output configurationGregory Nutt2014-08-011-1/+1
* SAMA5 SSC: Start Delay is now configurableGregory Nutt2014-08-012-54/+122
* SAMA5 SSC: Frame Synch Delay is now configurableGregory Nutt2014-08-012-58/+235
* SAMA5D SSC: Needs to account for data offset in audio buffer.Gregory Nutt2014-07-311-8/+13
* SAMA5D3X-EK: Add support for the WM8904 audio CODECGregory Nutt2014-07-312-2/+2
* SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5...Gregory Nutt2014-07-313-4/+5
* SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are fu...Gregory Nutt2014-07-301-5/+3
* SAMA5D HSMCI: Fix a problem on card insertion/removal callback handling. Int...Gregory Nutt2014-07-301-13/+34
* SAMA5D HSMCI: Add method to do RX transfer without DMA. The 8-byte SCR trans...Gregory Nutt2014-07-291-64/+200
* SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCKGregory Nutt2014-07-291-3/+8
* Cosmetic changes to commentsGregory Nutt2014-07-291-1/+1
* Fixes to last SAMA5 PMIC checkinGregory Nutt2014-07-281-3/+5
* LPC17xx: DC updates from Max. Also fixes some syntax errors that I introduce...Gregory Nutt2014-07-282-85/+71
* ARM: Move L2 cache initialization to much later in the sequenceGregory Nutt2014-07-277-38/+43
* ARMv7-A L2 Cache currently depends on EXPERIMENTAL because it does not yet wo...Gregory Nutt2014-07-261-1/+1
* ARMv7 L2 Cache: Minor bugfixes/improvementsGregory Nutt2014-07-262-16/+41
* Enables cache early in boot-up sequenceGregory Nutt2014-07-261-2/+7
* Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache opera...Gregory Nutt2014-07-2612-102/+102
* New cache.h file. Renames cp15_XYZ_cache() to arch_XYZ_cache() and addes L2...Gregory Nutt2014-07-261-0/+191
* Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commi...Gregory Nutt2014-07-261-5/+5
* arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add in...Gregory Nutt2014-07-265-20/+1217
* ARMv7-A: L2CC PL310 address filtering is an optional featureGregory Nutt2014-07-252-3/+10
* ARMv7-A: Add missing L2CC PL310 bit definitionsGregory Nutt2014-07-252-5/+85
* rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/ar...Gregory Nutt2014-07-254-75/+96
* 3rd time is a charm. Max is right, the initial priority setting should be NV...Gregory Nutt2014-07-241-1/+1
* Oops, should have been NVIC_SYSH_PRIORITY_DEFAULTGregory Nutt2014-07-241-1/+1
* LPC17 Ethernet: Added option to use the kernel worker thread to do most of th...Gregory Nutt2014-07-242-21/+133
* Added burstmode ADC conversion mode, with CONFIG_ADC_BURSTMODE option in Kcon...Gregory Nutt2014-07-241-8/+223
* Mostly cosmetic changes from MaxGregory Nutt2014-07-243-66/+25
* Eliminate warnings. From MaxGregory Nutt2014-07-241-13/+6
* Correct the initial value of the BASEPRI register. This was apparently neve...Gregory Nutt2014-07-241-1/+9
* Fix a recently introduced typo that was being masked by some bad conditional ...Gregory Nutt2014-07-221-4/+6
* Update ChangeLogGregory Nutt2014-07-221-1/+1
* STM32 OTGFS device: Various changes to try to reduce that amount of time in ...Gregory Nutt2014-07-221-12/+11
* Fix typos in the STM32 DAC header file. From Petteri AimonenGregory Nutt2014-07-221-2/+2
* SAMA5D4 XDMAC: Never sets a channel as secure. Will probably have to revisit...Gregory Nutt2014-07-211-0/+4
* SAMA5D4: Fix some HSMCI issues when XDMAC0 is enabledGregory Nutt2014-07-211-29/+38
* SAMA5 HSMCI: Correct multi-block DMA setup; Fixes related to DMA timeout. St...Gregory Nutt2014-07-211-103/+162
* SAMA5 XDMAC: Missing some CUBC bitsGregory Nutt2014-07-211-3/+5
* SAMA4D5 HSMCI: Set burst size to 1, sample DMA registers on timeout, and don'...Gregory Nutt2014-07-211-63/+100
* XDMAC register sampling missed CIM register; Should not set SWREQ bit in DMA ...Gregory Nutt2014-07-212-0/+7
* Fix a commented out assertionGregory Nutt2014-07-201-4/+2
* Fix typos in commentsGregory Nutt2014-07-201-2/+2
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