1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
|
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_gpioint.c
*
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <debug.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "chip.h"
#include "lpc17_gpio.h"
#include "lpc17_pinconn.h"
#include "lpc17_internal.h"
#ifdef CONFIG_GPIO_IRQ
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/* We have to remember the configured interrupt setting.. PINs are not
* actually set up to interrupt until the interrupt is enabled.
*/
#ifdef CONFIG_GPIO_IRQ
uint64_t g_intedge0;
atic uint64_t g_intedge2;
#endif
/****************************************************************************
* Public Data
****************************************************************************/
/* These tables have global scope because they are also used in
* lpc17_gpiodbg.c
*/
/* We have to remember the configured interrupt setting.. PINs are not
* actually set up to interrupt until the interrupt is enabled.
*/
#ifdef CONFIG_GPIO_IRQ
uint64_t g_intedge0;
uint64_t g_intedge2;
#endif
/* FIO register base addresses */
const uint32_t g_fiobase[GPIO_NPORTS] =
{
LPC17_FIO0_BASE,
LPC17_FIO1_BASE,
LPC17_FIO2_BASE,
LPC17_FIO3_BASE,
LPC17_FIO4_BASE
};
/* Port 0 and Port 2 can provide a single interrupt for any combination of
* port pins
*/
const uint32_t g_intbase[GPIO_NPORTS] =
{
LPC17_GPIOINT0_OFFSET,
0,
LPC17_GPIOINT2_OFFSET,
0,
0
};
const uint32_t g_lopinsel[GPIO_NPORTS] =
{
LPC17_PINCONN_PINSEL0,
LPC17_PINCONN_PINSEL2,
LPC17_PINCONN_PINSEL4,
0,
0
};
const uint32_t g_hipinsel[GPIO_NPORTS] =
{
LPC17_PINCONN_PINSEL1,
LPC17_PINCONN_PINSEL3,
0,
LPC17_PINCONN_PINSEL7,
LPC17_PINCONN_PINSEL9
};
const uint32_t g_lopinmode[GPIO_NPORTS] =
{
LPC17_PINCONN_PINMODE0,
LPC17_PINCONN_PINMODE2,
LPC17_PINCONN_PINMODE4,
0,
0
};
const uint32_t g_hipinmode[GPIO_NPORTS] =
{
LPC17_PINCONN_PINMODE1,
LPC17_PINCONN_PINMODE3,
0,
LPC17_PINCONN_PINMODE7,
LPC17_PINCONN_PINMODE9
};
const uint32_t g_odmode[GPIO_NPORTS] =
{
LPC17_PINCONN_ODMODE0,
LPC17_PINCONN_ODMODE1,
LPC17_PINCONN_ODMODE2,
LPC17_PINCONN_ODMODE3,
LPC17_PINCONN_ODMODE4
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: lpc17_getintedge
*
* Description:
* Get the stored interrupt edge configuration.
*
****************************************************************************/
static unsigned int lpc17_getintedge(unsigned int port, unsigned int pin)
{
const uint64_t *intedge;
/* Which word to we use? */
if (port == 0)
{
intedge = g_intedge0;
}
else if (port == 2)
{
intedge = g_intedge2;
}
else
{
return 0;
}
/* Return the value for the PINSEL */
return (unsigned int)((*intedge & (3 << (pin << 1))) >> shift);
}
/****************************************************************************
* Name: lpc17_setintedge
*
* Description:
* Set the edge interrupt enabled bits for this pin.
*
****************************************************************************/
static void lpc17_setintedge(uint32_t intbase, unsigned int pin, unsigned int edges)
{
int regval;
/* Set/clear the rising edge enable bit */
regval = getreg32(intbase + LPC17_GPIOINT_INTENR_OFFSET);
if ((edges & 2) != 0)
{
regval |= GPIOINT(pin);
}
else
{
regval &= ~GPIOINT(pin);
}
endif
putreg32(regval, intbase + LPC17_GPIOINT_INTENR_OFFSET);
/* Set/clear the rising edge enable bit */
regval = getreg32(intbase + LPC17_GPIOINT_INTENF_OFFSET);
if ((edges & 1) != 0)
{
regval |= GPIOINT(pin);
}
else
{
regval &= ~GPIOINT(pin);
}
endif
putreg32(regval, intbase + LPC17_GPIOINT_INTENF_OFFSET);
}
/****************************************************************************
* Name: lpc17_irq2port
*
* Description:
* Given an IRQ number, return the GPIO port number (0 or 2) of the interrupt.
*
****************************************************************************/
static int lpc17_irq2port(int irq)
{
/* Set 1: 12 interrupts p0.0-p0.11 */
if (irq >= LPC17_VALID_FIRST0L && irq < (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L)
{
return 0;
}
/* Set 2: 16 interrupts p0.15-p0.30 */
else if (irq >= LPC17_VALID_FIRST0H && irq < (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H)
{
return 0;
}
/* Set 3: 14 interrupts p2.0-p2.13 */
else if (irq >= LPC17_VALID_NIRQS2 && irq < (LPC17_VALID_FIRST2+LPC17_VALID_NIRQS2)
{
return 2;
}
return -EINVAL;
}
/****************************************************************************
* Name: lpc17_irq2pin
*
* Description:
* Given an IRQ number, return the GPIO pin number (0..31) of the interrupt.
*
****************************************************************************/
static int lpc17_irq2port(int irq)
{
/* Set 1: 12 interrupts p0.0-p0.11 */
if (irq >= LPC17_VALID_FIRST0L && irq < (LPC17_VALID_FIRST0L+LPC17_VALID_NIRQS0L)
{
return irq - LPC17_VALID_FIRST0L + LPC17_VALID_SHIFT0L;
}
/* Set 2: 16 interrupts p0.15-p0.30 */
else if (irq >= LPC17_VALID_FIRST0H && irq < (LPC17_VALID_FIRST0H+LPC17_VALID_NIRQS0H)
{
return irq - LPC17_VALID_FIRST0H + LPC17_VALID_SHIFT0H;
12
}
/* Set 3: 14 interrupts p2.0-p2.13 */
else if (irq >= LPC17_VALID_NIRQS2 && irq < (LPC17_VALID_FIRST2+LPC17_VALID_NIRQS2)
{
return irq - LPC17_VALID_FIRST0H + LPC17_VALID_SHIFT2;
}
return -EINVAL;
}
/****************************************************************************
* Global Functions
****************************************************************************/
/************************************************************************************
* Name: lpc17_gpioirqenable
*
* Description:
* Enable the interrupt for specified GPIO IRQ
*
************************************************************************************/
void lpc17_gpioirqenable(int irq)
{
/* Map the IRQ number to a port number */
int port = lpc17_irq2port(irq);
if (port >= 0)
{
/* The IRQ number does correspond to an interrupt port. Now get the base
* address of the GPIOINT registers for the port.
*/
uint32_t intbase = g_intbase[GPIO_NPORTS];
if (intabase != 0)
{
/* And get the pin number associated with the port */
unsigned int pin = g_irq2pin(irq);
unsigned int edges = lpc17_getintedge(port, pin);
lpc17_setintedge(intbase, pin, edges);
}
}
}
/************************************************************************************
* Name: lpc17_gpioirqdisable
*
* Description:
* Disable the interrupt for specified GPIO IRQ
*
************************************************************************************/
void lpc17_gpioirqdisable(int irq)
{
/* Map the IRQ number to a port number */
int port = lpc17_irq2port(irq);
if (port >= 0)
{
/* The IRQ number does correspond to an interrupt port. Now get the base
* address of the GPIOINT registers for the port.
*/
uint32_t intbase = g_intbase[GPIO_NPORTS];
if (intabase != 0)
{
/* And get the pin number associated with the port */
unsigned int pin = g_irq2pin(irq);
lpc17_setintedge(intbase, pin, 0);
}
}
}
#warning "Still needs initialization, interrupt handling and decoding logic"
#endif /* CONFIG_GPIO_IRQ */
|