1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
|
/************************************************************
* irq.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
/* This file should never be included directed but, rather,
* only indirectly through nuttx/irq.h
*/
#ifndef __ARCH_C5471_IRQ_H
#define __ARCH_C5471_IRQ_H
/************************************************************
* Included Files
************************************************************/
/************************************************************
* Definitions
************************************************************/
/* IRQ Stack Frame Format:
*
* Context is always saved/restored in the same way:
*
* (1) stmia rx, {r0-r14}
* (2) then the PC and CPSR
*
* This results in the following set of indices that
* can be used to access individual registers in the
* xcp.regs array:
*/
#define REG_R0 (0)
#define REG_R1 (1)
#define REG_R2 (2)
#define REG_R3 (3)
#define REG_R4 (4)
#define REG_R5 (5
#define REG_R6 (6)
#define REG_R7 (7)
#define REG_R8 (8)
#define REG_R9 (9)
#define REG_R10 (10)
#define REG_R11 (11)
#define REG_R12 (12)
#define REG_R13 (13)
#define REG_R14 (14)
#define REG_R15 (15)
#define REG_CPSR (16)
#define XCPTCONTEST_REGS (17)
#define XCPTCONTEXT_SIZE (4 * XCPTCONTEST_REGS)
#define REG_A1 REG_R0
#define REG_A2 REG_R1
#define REG_A3 REG_R2
#define REG_A4 REG_R3
#define REG_V1 REG_R4
#define REG_V2 REG_R5
#define REG_V3 REG_R6
#define REG_V4 REG_R7
#define REG_V5 REG_R8
#define REG_V6 REG_R9
#define REG_V7 REG_R10
#define REG_SB REG_R9
#define REG_SL REG_R10
#define REG_FP REG_R11
#define REG_IP REG_R12
#define REG_SP REG_R13
#define REG_LR REG_R14
#define REG_PC REG_R15
/* C5471 Interrupts */
#define C5471_IRQ_TIMER0 0
#define C5471_IRQ_TIMER1 1
#define C5471_IRQ_TIMER2 2
#define C5471_IRQ_GPIO0 3
#define C5471_IRQ_ETHER 4
#define C5471_IRQ_KBGPIO_0_7 5
#define C5471_IRQ_UART 6
#define C5471_IRQ_UART_IRDA 7
#define C5471_IRQ_KBGPIO_8_15 8
#define C5471_IRQ_GPIO3 9
#define C5471_IRQ_GPIO2 10
#define C5471_IRQ_I2C 11
#define C5471_IRQ_GPIO1 12
#define C5471_IRQ_SPI 13
#define C5471_IRQ_GPIO_4_19 14
#define C5471_IRQ_API 15
#define C5471_IRQ_WATCHDOG C5471_IRQ_TIMER0
#define C5471_IRQ_SYSTIMER C5471_IRQ_TIMER2
#define NR_IRQS (C5471_IRQ_API+1)
/************************************************************
* Public Types
************************************************************/
/* This struct defines the way the registers are stored. We
* need to save:
*
* 1 CPSR
* 7 Static registers, v1-v7 (aka r4-r10)
* 1 Frame pointer, fp (aka r11)
* 1 Stack pointer, sp (aka r13)
* 1 Return address, lr (aka r14)
* ---
* 11 (XCPTCONTEXT_USER_REG)
*
* On interrupts, we also need to save:
* 4 Volatile registers, a1-a4 (aka r0-r3)
* 1 Scratch Register, ip (aka r12)
*---
* 5 (XCPTCONTEXT_IRQ_REGS)
*
* For a total of 17 (XCPTCONTEST_REGS)
*/
#ifndef __ASSEMBLY__
struct xcptcontext
{
/* The following function pointer is non-zero if there
* are pending signals to be processed.
*/
void *sigdeliver; /* Actual type is sig_deliver_t */
/* These are saved copies of LR and CPSR used during
* signal processing.
*/
uint32 saved_pc;
uint32 saved_cpsr;
/* Register save area */
uint32 regs[XCPTCONTEST_REGS];
};
#endif
/************************************************************
* Inline functions
************************************************************/
#ifndef __ASSEMBLY__
/* Save the current interrupt enable state & disable IRQs */
static inline uint32 irqsave(void)
{
unsigned long flags;
unsigned long temp;
__asm__ __volatile__
(
"\tmrs %0, cpsr\n"
"\torr %1, %0, #128\n"
"\tmsr cpsr_c, %1"
: "=r" (flags), "=r" (temp)
:
: "memory");
return flags;
}
/* Restore saved IRQ & FIQ state */
static inline void irqrestore(uint32 flags)
{
__asm__ __volatile__
(
"msr cpsr_c, %0"
:
: "r" (flags)
: "memory");
}
static inline void system_call(swint_t func, uint32 parm1,
uint32 parm2, uint32 parm3)
{
__asm__ __volatile__
(
"mov\tr0,%0\n\t"
"mov\tr1,%1\n\t"
"mov\tr2,%2\n\t"
"mov\tr2,%3\n\t"
"swi\t0x900001\n\t"
:
: "r" ((long)(func)), "r" ((long)(parm1)),
"r" ((long)(parm2)), "r" ((long)(parm3))
: "r0", "r1", "r2", "r3", "lr");
}
#endif
/************************************************************
* Public Variables
************************************************************/
/************************************************************
* Public Function Prototypes
************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
#else
#define EXTERN extern
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif
#endif /* __ARCH_C5471_IRQ_H */
|
