summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGregory Nutt <gnutt@nuttx.org>2014-04-04 11:37:39 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-04-04 11:37:39 -0600
commit0dadcfd847b9cf69eec96286320c106e59b6b47e (patch)
tree7b77289f3d475c81b0ca1eb61344a5fe6896e77e
parent9e2a7912735e09e2776f50b385a04e0afcbd7f22 (diff)
downloadnuttx-0dadcfd847b9cf69eec96286320c106e59b6b47e.tar.gz
nuttx-0dadcfd847b9cf69eec96286320c106e59b6b47e.tar.bz2
nuttx-0dadcfd847b9cf69eec96286320c106e59b6b47e.zip
SAMA5: Fix some issues with SDRAM at 528MHz CPU clock
-rw-r--r--nuttx/configs/sama5d3-xplained/src/sam_sdram.c6
-rw-r--r--nuttx/configs/sama5d3x-ek/README.txt32
-rw-r--r--nuttx/configs/sama5d3x-ek/src/sam_sdram.c6
3 files changed, 29 insertions, 15 deletions
diff --git a/nuttx/configs/sama5d3-xplained/src/sam_sdram.c b/nuttx/configs/sama5d3-xplained/src/sam_sdram.c
index c9cf8a5ea..8190d7cca 100644
--- a/nuttx/configs/sama5d3-xplained/src/sam_sdram.c
+++ b/nuttx/configs/sama5d3-xplained/src/sam_sdram.c
@@ -112,13 +112,13 @@
#if defined(CONFIG_SAMA5D3XPLAINED_384MHZ)
# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15625) + LOOP_GUARD)
-# define USEC_TO_COUNT(usec) (((usec) * 1000000) / 15625) + LOOP_GUARD)
+# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15625) + LOOP_GUARD)
#elif defined(CONFIG_SAMA5D3XPLAINED_528MHZ)
# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 11364) + LOOP_GUARD)
-# define USEC_TO_COUNT(usec) (((usec) * 1000000) / 11364) + LOOP_GUARD)
+# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 11364) + LOOP_GUARD)
#else /* #elif defined(CONFIG_SAMA5D3XPLAINED_396MHZ) */
# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15152) + LOOP_GUARD)
-# define USEC_TO_COUNT(usec) (((usec) * 1000000) / 15152) + LOOP_GUARD)
+# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15152) + LOOP_GUARD)
#endif
/****************************************************************************
diff --git a/nuttx/configs/sama5d3x-ek/README.txt b/nuttx/configs/sama5d3x-ek/README.txt
index a6a52752c..bda6bbcbf 100644
--- a/nuttx/configs/sama5d3x-ek/README.txt
+++ b/nuttx/configs/sama5d3x-ek/README.txt
@@ -1436,11 +1436,6 @@ USB High-Speed Host
Application Configuration -> NSH Library
CONFIG_NSH_ARCHINIT=y : NSH board-initialization
- NOTE: When OHCI is selected, the SAMA5 will operate at 384MHz instead of
- 396MHz. This is so that the PLL generates a frequency which is a multiple
- of the 48MHz needed for OHCI. The delay loop calibration values that are
- used will be off slightly because of this.
-
EHCI
----
@@ -1630,7 +1625,7 @@ SDRAM Support
CONFIG_SYSTEM_RAMTEST=y
In this configuration, the SDRAM is not added to heap and so is not
- accessable to the applications. So the RAM test can be freely executed
+ accessible to the applications. So the RAM test can be freely executed
against the SRAM memory beginning at address 0x2000:0000 (DDR CS):
nsh> ramtest -h
@@ -3389,9 +3384,28 @@ To-Do List
1) Currently the SAMA5Dx is running at 396MHz in these configurations. This
is because the timing for the PLLs, NOR FLASH, and SDRAM came from the
- Atmel NoOS sample code which runs at that rate. The SAMA5Dx is capable
- of running at 528MHz, however. The setup for that configuration exists
- in the Bareboard assembly language setup and should be incorporated.
+ Atmel NoOS sample code which runs at that rate.
+
+ The SAMA5Dx is capable of running at 528MHz, however, and is easily
+ configured:
+
+ Board Selection -> CPU Frequency
+ CONFIG_SAMA5D3xEK_396MHZ=n
+ CONFIG_SAMA5D3xEK_528MHZ=y
+
+ Basic operation at 528MHz has been verified but is not the default in
+ these configurations because most testing was done at 396MHz.
+
+ - The apps/system/ramtest runs without errors, but runs very slowly.
+ It looks like it takes about 90 seconds to test 1MiB of RAM. That
+ means that a full 256MiB RAM test should take about 6 hours. That
+ is too long. This implies that there is something wrong with the
+ SDRAM configuration.
+ - Similarly, while attempting to calibrate the delay loop, I find that
+ the 100s calibration delay runs for a very long time. This is not
+ correct, of course, with a higher CPU clock, the calibration delay
+ should be shorter if anything!
+ - NAND time has not been tested.
2) Most of these configurations execute from NOR FLASH. I have been unable
to execute these configurations from NOR FLASH by closing the BMS jumper
diff --git a/nuttx/configs/sama5d3x-ek/src/sam_sdram.c b/nuttx/configs/sama5d3x-ek/src/sam_sdram.c
index efb40684a..080ed9a12 100644
--- a/nuttx/configs/sama5d3x-ek/src/sam_sdram.c
+++ b/nuttx/configs/sama5d3x-ek/src/sam_sdram.c
@@ -112,13 +112,13 @@
#if defined(CONFIG_SAMA5D3xEK_384MHZ)
# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15625) + LOOP_GUARD)
-# define USEC_TO_COUNT(usec) (((usec) * 1000000) / 15625) + LOOP_GUARD)
+# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15625) + LOOP_GUARD)
#elif defined(CONFIG_SAMA5D3xEK_528MHZ)
# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 11364) + LOOP_GUARD)
-# define USEC_TO_COUNT(usec) (((usec) * 1000000) / 11364) + LOOP_GUARD)
+# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 11364) + LOOP_GUARD)
#else /* #elif defined(CONFIG_SAMA5D3xEK_396MHZ) */
# define NSEC_TO_COUNT(nsec) ((((nsec) * 1000) / 15152) + LOOP_GUARD)
-# define USEC_TO_COUNT(usec) (((usec) * 1000000) / 15152) + LOOP_GUARD)
+# define USEC_TO_COUNT(usec) ((((usec) * 1000000) / 15152) + LOOP_GUARD)
#endif
/****************************************************************************