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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-05-07 04:20:12 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-05-07 04:20:12 +0000 |
| commit | 56651d825a6651d0f70ec59d798c5d7f584786d1 (patch) | |
| tree | a59be9c5a61b7708f77341b6e824da48dfff5d4a /nuttx/arch/arm/src/lm3s/lm3s_internal.h | |
| parent | 8c171192c2de60763a079d0abdba19694eb7a76a (diff) | |
| download | nuttx-56651d825a6651d0f70ec59d798c5d7f584786d1.tar.gz nuttx-56651d825a6651d0f70ec59d798c5d7f584786d1.tar.bz2 nuttx-56651d825a6651d0f70ec59d798c5d7f584786d1.zip | |
Add LM3S6965 configuration
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2655 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lm3s/lm3s_internal.h')
| -rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_internal.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_internal.h b/nuttx/arch/arm/src/lm3s/lm3s_internal.h index dd51e7a9b..5fef7dd66 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_internal.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_internal.h @@ -51,7 +51,7 @@ * Pre-processor Definitions ************************************************************************************/ -/* The LM3S6918 only supports 8 priority levels. The hardware priority mechanism +/* The LM3S69xx only supports 8 priority levels. The hardware priority mechanism * will only look at the upper N bits of the 8-bit priority level (where N is 3 for * the Stellaris family), so any prioritization must be performed in those bits. * The default priority level is set to the middle value @@ -153,7 +153,7 @@ * hardware function for each pin. */ -#ifdef CONFIG_ARCH_CHIP_LM3S6918 +#if defined(CONFIG_ARCH_CHIP_LM3S6918) # define GPIO_UART0_RX (GPIO_FUNC_PFINPUT | GPIO_PORTA | 0) /* PA0: UART 0 receive (U0Rx) */ # define GPIO_UART0_TX (GPIO_FUNC_PFOUTPUT | GPIO_PORTA | 1) /* PA1: UART 0 transmit (U0Tx) */ # define GPIO_SSI0_CLK (GPIO_FUNC_PFIO | GPIO_PORTA | 2) /* PA2: SSI0 clock (SSI0Clk) */ @@ -191,7 +191,7 @@ # define GPIO_ETHPHY_LED1 (GPIO_FUNC_PFOUTPUT | GPIO_PORTF | 2) /* PF2: LED1 */ # define GPIO_ETHPHY_LED0 (GPIO_FUNC_PFOUTPUT | GPIO_PORTF | 3) /* PF3: LED0 */ # define GPIO_I2C1_SCL (GPIO_FUNC_PFOUTPUT | GPIO_PORTG | 0) /* PG0: I2C1 clock (I2C1SCL) */ -#ifdef CONFIG_ARCH_CHIP_LM3S6965 +#elif defined(CONFIG_ARCH_CHIP_LM3S6965) # define GPIO_UART0_RX (GPIO_FUNC_PFINPUT | GPIO_PORTA | 0) /* PA0: UART 0 receive (U0Rx) */ # define GPIO_UART0_TX (GPIO_FUNC_PFOUTPUT | GPIO_PORTA | 1) /* PA1: UART 0 transmit (U0Tx) */ # define GPIO_SSI0_CLK (GPIO_FUNC_PFIO | GPIO_PORTA | 2) /* PA2: SSI0 clock (SSI0Clk) */ |