Add config for 2G Engineering Nucleus LPC1768 board

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2728 42af7a65-404d-4744-a932-0658087f49c3

17 files changed, 2395 insertions, 20 deletions

diff --git a/nuttx/arch/arm/include/lpc17xx/irq.h b/nuttx/arch/arm/include/lpc17xx/irq.h
index 37b775994..f9d8de546 100755
--- a/nuttx/arch/arm/include/lpc17xx/irq.h
+++ b/nuttx/arch/arm/include/lpc17xx/irq.h
@@ -85,13 +85,13 @@
                                                        * Capture 0-1 */
 #define LPC17_IRQ_TMR3          (LPC17_IRQ_EXTINT+4)  /* Timer 3 Match 0-3
                                                        * Capture 0-1 */
-#define LPC17_IRQ_UART0         (LPC17_IRQ_EXTINT+5)  /* UART0 Rx Line Status (RLS)
+#define LPC17_IRQ_UART0         (LPC17_IRQ_EXTINT+5)  /* UART 0 Rx Line Status (RLS)
                                                        * Transmit Holding Register Empty (THRE)
                                                        * Rx Data Available (RDA)
                                                        * Character Time-out Indicator (CTI)
                                                        * End of Auto-Baud (ABEO)
                                                        * Auto-Baud Time-Out (ABTO) */
-#define LPC17_IRQ_UART1         (LPC17_IRQ_EXTINT+6)  /* UART1 Rx Line Status (RLS)
+#define LPC17_IRQ_UART1         (LPC17_IRQ_EXTINT+6)  /* UART 1 Rx Line Status (RLS)
                                                        * Transmit Holding Register Empty (THRE)
                                                        * Rx Data Available (RDA)
                                                        * Character Time-out Indicator (CTI)
@@ -128,10 +128,10 @@
 #define LPC17_IRQ_PLL0          (LPC17_IRQ_EXTINT+16) /* PLL0 (Main PLL) PLL0 Lock (PLOCK0) */
 #define LPC17_IRQ_RTC           (LPC17_IRQ_EXTINT+17) /* RTC Counter Increment (RTCCIF)
                                                        * Alarm (RTCALF) */
-#define LPC17_IRQ_EINT0         (LPC17_IRQ_EXTINT+18) /* External Interrupt External Interrupt 0 (EINT0) */
-#define LPC17_IRQ_EINT1         (LPC17_IRQ_EXTINT+19) /* External Interrupt External Interrupt 1 (EINT1) */
-#define LPC17_IRQ_EINT2         (LPC17_IRQ_EXTINT+20) /* External Interrupt External Interrupt 2 (EINT2) */
-#define LPC17_IRQ_EINT3         (LPC17_IRQ_EXTINT+21) /* External Interrupt External Interrupt 3 (EINT3)
+#define LPC17_IRQ_EINT0         (LPC17_IRQ_EXTINT+18) /* External Interrupt 0 (EINT0) */
+#define LPC17_IRQ_EINT1         (LPC17_IRQ_EXTINT+19) /* External Interrupt 1 (EINT1) */
+#define LPC17_IRQ_EINT2         (LPC17_IRQ_EXTINT+20) /* External Interrupt 2 (EINT2) */
+#define LPC17_IRQ_EINT3         (LPC17_IRQ_EXTINT+21) /* External Interrupt 3 (EINT3)
                                                        * Note: EINT3 channel is shared with GPIO interrupts */
 #define LPC17_IRQ_ADC           (LPC17_IRQ_EXTINT+22) /* ADC A/D Converter end of conversion */
 #define LPC17_IRQ_BOD           (LPC17_IRQ_EXTINT+23) /* BOD Brown Out detect */
diff --git a/nuttx/arch/arm/src/lpc17xx/Make.defs b/nuttx/arch/arm/src/lpc17xx/Make.defs
new file mode 100755
index 000000000..b6b1276e2
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc17xx/Make.defs
@@ -0,0 +1,63 @@
+############################################################################
+# arch/arm/src/lpc17xx/Make.defs
+#
+#   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+# The start-up, "head", file
+
+HEAD_ASRC	= lpc17_vectors.S
+
+# Common ARM and Cortex-M3 files
+
+CMN_ASRCS	= up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
+CMN_CSRCS	= up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
+		  up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c \
+		  up_initialstate.c up_interruptcontext.c up_modifyreg8.c \
+		  up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
+		  up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
+		  up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
+		  up_hardfault.c up_svcall.c
+
+# Required SAM3U files
+
+CHIP_ASRCS	=
+CHIP_CSRCS	= lpc17_start.c
+#CHIP_CSRCS	= lpc17_allocateheap.c lpc17_clockconfig.c lpc17_gpioirq.c \
+#		  lpc17_irq.c lpc17_lowputc.c lpc17_pio.c lpc17_serial.c \
+#		  lpc17_start.c lpc17_timerisr.c
+
+# Configuration-dependent SAM3U files
+
+ifeq ($(CONFIG_LPC17_DMA),y)
+CHIP_CSRCS	+= lpc17_dmac.c
+endif
diff --git a/nuttx/arch/arm/src/lpc17xx/chip.h b/nuttx/arch/arm/src/lpc17xx/chip.h
index c743b7ffd..0a921c4cf 100755
--- a/nuttx/arch/arm/src/lpc17xx/chip.h
+++ b/nuttx/arch/arm/src/lpc17xx/chip.h
@@ -48,7 +48,7 @@
 
 /* Get customizations for each supported chip */
 
-#if defined(CONFIG_LPC17XX_LPC1769) || defined(CONFIG_LPC17XX_LPC1768)
+#if defined(CONFIG_ARCH_CHIP_LPC1769) || defined(CONFIG_ARCH_CHIP_LPC1768)
 #  define LPC17_FLASH_SIZE      (512*1024) /* 512Kb */
 #  define LPC17_SRAM_SIZE       (64*1024)  /*  64Kb */
 #  define LPC17_NETHCONTROLLERS 1  /* One Ethernet controller */
@@ -58,7 +58,7 @@
 #  define LPC17_NCAN            2  /* Two CAN controllers */
 #  define LPC17_NI2S            1  /* One I2S module */
 #  define LPC17_NDAC            1  /* One DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1767)
+#elif defined(CONFIG_ARCH_CHIP_LPC1767)
 #  define LPC17_FLASH_SIZE      (512*1024) /* 512Kb */
 #  define LPC17_SRAM_SIZE       (64*1024)  /*  64Kb */
 #  define LPC17_NETHCONTROLLERS 1  /* One Ethernet controller */
@@ -68,7 +68,7 @@
 #  define LPC17_NCAN            0  /* No CAN controllers */
 #  define LPC17_NI2S            1  /* One I2S module */
 #  define LPC17_NDAC            1  /* One DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1766)
+#elif defined(CONFIG_ARCH_CHIP_LPC1766)
 #  define LPC17_FLASH_SIZE      (256*1024) /* 256Kb */
 #  define LPC17_SRAM_SIZE       (64*1024)  /*  64Kb */
 #  define LPC17_NETHCONTROLLERS 1  /* One Ethernet controller */
@@ -78,7 +78,7 @@
 #  define LPC17_NCAN            2  /* Two CAN controllers */
 #  define LPC17_NI2S            1  /* One I2S module */
 #  define LPC17_NDAC            1  /* One DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1765)
+#elif defined(CONFIG_ARCH_CHIP_LPC1765)
 #  define LPC17_FLASH_SIZE      (256*1024) /* 256Kb */
 #  define LPC17_SRAM_SIZE       (64*1024)  /*  64Kb */
 #  define LPC17_NETHCONTROLLERS 0  /* No Ethernet controller */
@@ -88,7 +88,7 @@
 #  define LPC17_NCAN            2  /* Two CAN controllers */
 #  define LPC17_NI2S            1  /* One I2S module */
 #  define LPC17_NDAC            1  /* One DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1764)
+#elif defined(CONFIG_ARCH_CHIP_LPC1764)
 #  define LPC17_FLASH_SIZE      (128*1024) /* 128Kb */
 #  define LPC17_SRAM_SIZE       (32*1024)  /*  32Kb */
 #  define LPC17_NETHCONTROLLERS 1  /* One Ethernet controller */
@@ -98,7 +98,7 @@
 #  define LPC17_NCAN            2  /* Two CAN controllers */
 #  define LPC17_NI2S            0  /* No I2S modules */
 #  define LPC17_NDAC            0  /* No DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1759)
+#elif defined(CONFIG_ARCH_CHIP_LPC1759)
 #  define LPC17_FLASH_SIZE      (512*1024) /* 512Kb */
 #  define LPC17_SRAM_SIZE       (64*1024)  /*  64Kb */
 #  define LPC17_NETHCONTROLLERS 0  /* No Ethernet controller */
@@ -108,7 +108,7 @@
 #  define LPC17_NCAN            2  /* Two CAN controllers */
 #  define LPC17_NI2S            1  /* One I2S module */
 #  define LPC17_NDAC            1  /* One DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1758)
+#elif defined(CONFIG_ARCH_CHIP_LPC1758)
 #  define LPC17_FLASH_SIZE      (512*1024) /* 512Kb */
 #  define LPC17_SRAM_SIZE       (64*1024)  /*  64Kb */
 #  define LPC17_NETHCONTROLLERS 1  /* One Ethernet controller */
@@ -118,7 +118,7 @@
 #  define LPC17_NCAN            2  /* Two CAN controllers */
 #  define LPC17_NI2S            1  /* One I2S module */
 #  define LPC17_NDAC            1  /* One DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1756)
+#elif defined(CONFIG_ARCH_CHIP_LPC1756)
 #  define LPC17_FLASH_SIZE      (256*1024) /* 256Kb */
 #  define LPC17_SRAM_SIZE       (32*1024)  /*  32Kb */
 #  define LPC17_NETHCONTROLLERS 0  /* No Ethernet controller */
@@ -128,7 +128,7 @@
 #  define LPC17_NCAN            2  /* Two CAN controllers */
 #  define LPC17_NI2S            1  /* One I2S module */
 #  define LPC17_NDAC            1  /* One DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1754)
+#elif defined(CONFIG_ARCH_CHIP_LPC1754)
 #  define LPC17_FLASH_SIZE      (128*1024) /* 128Kb */
 #  define LPC17_SRAM_SIZE       (32*1024)  /*  32Kb */
 #  define LPC17_NETHCONTROLLERS 0  /* No Ethernet controller */
@@ -138,7 +138,7 @@
 #  define LPC17_NCAN            1  /* One CAN controller */
 #  define LPC17_NI2S            0  /* No I2S modules */
 #  define LPC17_NDAC            1  /* One DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1752)
+#elif defined(CONFIG_ARCH_CHIP_LPC1752)
 #  define LPC17_FLASH_SIZE      (64*1024) /* 65Kb */
 #  define LPC17_SRAM_SIZE       (16*1024) /* 16Kb */
 #  define LPC17_NETHCONTROLLERS 0  /* No Ethernet controller */
@@ -148,7 +148,7 @@
 #  define LPC17_NCAN            1  /* One CAN controller */
 #  define LPC17_NI2S            0  /* No I2S modules */
 #  define LPC17_NDAC            0  /* No DAC module */
-#elif defined(CONFIG_LPC17XX_LPC1751)
+#elif defined(CONFIG_ARCH_CHIP_LPC1751)
 #  define LPC17_FLASH_SIZE      (32*1024) /* 32Kb */
 #  define LPC17_SRAM_SIZE       (8*1024)  /*  8Kb */
 #  define LPC17_NETHCONTROLLERS 0  /* No Ethernet controller */
@@ -166,7 +166,7 @@
  * file for the proper setup
  */
 
-#include "lpc17xx_memorymap.h"
+#include "lpc17_memorymap.h"
 
 /************************************************************************************
  * Public Types
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_internal.h b/nuttx/arch/arm/src/lpc17xx/lpc17_internal.h
new file mode 100755
index 000000000..13807509f
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_internal.h
@@ -0,0 +1,219 @@
+/************************************************************************************
+ * arch/arm/src/lpc17xx/lpc17_internal.h
+ *
+ *   Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_LPC17XX_LPC17_INTERNAL_H
+#define __ARCH_ARM_SRC_LPC17XX_LPC17_INTERNAL_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+
+#include "up_internal.h"
+#include "chip.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+
+/* Bit-encoded input to lpc17_configgpio() ******************************************/
+
+/* GPIO pin definitions *************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: lpc17_clockconfig
+ *
+ * Description:
+ *   Called to initialize the LPC17XX.  This does whatever setup is needed to put the
+ *   MCU in a usable state.  This includes the initialization of clocking using the
+ *   settings in board.h.
+ *
+ ************************************************************************************/
+
+EXTERN void lpc17_clockconfig(void);
+
+/************************************************************************************
+ * Name: lpc17_lowsetup
+ *
+ * Description:
+ *   Called at the very beginning of _start.  Performs low level initialization
+ *   including setup of the console UART.  This UART done early so that the serial
+ *   console is available for debugging very early in the boot sequence.
+ *
+ ************************************************************************************/
+
+EXTERN void lpc17_lowsetup(void);
+
+/************************************************************************************
+ * Name: lpc17_gpioirqinitialize
+ *
+ * Description:
+ *   Initialize logic to support a second level of interrupt decoding for GPIO pins.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+EXTERN void lpc17_gpioirqinitialize(void);
+#else
+#  define lpc17_gpioirqinitialize()
+#endif
+
+/************************************************************************************
+ * Name: lpc17_configgpio
+ *
+ * Description:
+ *   Configure a GPIO pin based on bit-encoded description of the pin.
+ *
+ ************************************************************************************/
+
+EXTERN int lpc17_configgpio(uint16_t cfgset);
+
+/************************************************************************************
+ * Name: lpc17_gpiowrite
+ *
+ * Description:
+ *   Write one or zero to the selected GPIO pin
+ *
+ ************************************************************************************/
+
+EXTERN void lpc17_gpiowrite(uint16_t pinset, bool value);
+
+/************************************************************************************
+ * Name: lpc17_gpioread
+ *
+ * Description:
+ *   Read one or zero from the selected GPIO pin
+ *
+ ************************************************************************************/
+
+EXTERN bool lpc17_gpioread(uint16_t pinset);
+
+/************************************************************************************
+ * Name: lpc17_gpioirq
+ *
+ * Description:
+ *   Configure an interrupt for the specified GPIO pin.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+EXTERN void lpc17_gpioirq(uint16_t pinset);
+#else
+#  define lpc17_gpioirq(pinset)
+#endif
+
+/************************************************************************************
+ * Name: lpc17_gpioirqenable
+ *
+ * Description:
+ *   Enable the interrupt for specified GPIO IRQ
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+EXTERN void lpc17_gpioirqenable(int irq);
+#else
+#  define lpc17_gpioirqenable(irq)
+#endif
+
+/************************************************************************************
+ * Name: lpc17_gpioirqdisable
+ *
+ * Description:
+ *   Disable the interrupt for specified GPIO IRQ
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_GPIO_IRQ
+EXTERN void lpc17_gpioirqdisable(int irq);
+#else
+#  define lpc17_gpioirqdisable(irq)
+#endif
+
+/************************************************************************************
+ * Function:  lpc17_dumpgpio
+ *
+ * Description:
+ *   Dump all GPIO registers associated with the base address of the provided pinset.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_DEBUG_GPIO
+EXTERN int lpc17_dumpgpio(uint32_t pinset, const char *msg);
+#else
+#  define lpc17_dumpgpio(p,m)
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ARCH_ARM_SRC_LPC17XX_LPC17_INTERNAL_H */
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_memorymap.h b/nuttx/arch/arm/src/lpc17xx/lpc17_memorymap.h
index 2153ac093..b56d35a8d 100755
--- a/nuttx/arch/arm/src/lpc17xx/lpc17_memorymap.h
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_memorymap.h
@@ -50,12 +50,12 @@
 

 /* Memory Map ***********************************************************************/

 

-#define LPC17_FLASH_BASE    0x00000000 /* -0x1fffffff: On-chip non-volatilenmemory */

+#define LPC17_FLASH_BASE    0x00000000 /* -0x1fffffff: On-chip non-volatile memory */

 #define LPC17_SRAM_BASE     0x10000000 /* -0x10007fff: On-chip SRAM (devices <=32Kb) */

 #define LPC17_ROM_BASE      0x1fff0000 /* -0x1fffffff: 8Kb Boot ROM with flash services */

 #define LPC17_AHBSRAM_BASE  0x20000000 /* -0x3fffffff: On-chip AHB SRAM (devices >32Kb) */

 #  define LPC17_SRAM_BANK0  0x20070000 /* -0x2007ffff: On-chip AHB SRAM Bank0 (devices >=32Kb) */

-#  define LPC17_SRAM_BANK1  0x20080000 /* -0x2008ffff: On-chip AHB SRAM Bank0 (devices 64Kb) */

+#  define LPC17_SRAM_BANK1  0x20080000 /* -0x2008ffff: On-chip AHB SRAM Bank1 (devices 64Kb) */

 #define LPC17_GPIO_BASE     0x2009c000 /* -0x2009ffff: GPIO */

 #define LPC17_APB_BASE      0x40000000 /* -0x5fffffff: APB Peripherals */

 #  define LPC17_APB0_BASE   0x40000000 /* -0x4007ffff: APB0 Peripherals */

diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_start.c b/nuttx/arch/arm/src/lpc17xx/lpc17_start.c
new file mode 100755
index 000000000..427e3a103
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_start.c
@@ -0,0 +1,151 @@
+/****************************************************************************
+ * arch/arm/src/lpc17xx/lpc17_start.c
+ * arch/arm/src/chip/lpc17_start.c
+ *
+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/init.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+
+#include "lpc17_internal.h"
+
+/****************************************************************************
+ * Private Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: showprogress
+ *
+ * Description:
+ *   Print a character on the UART to show boot status.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG
+#  define showprogress(c) up_lowputc(c)
+#else
+#  define showprogress(c)
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: _start
+ *
+ * Description:
+ *   This is the reset entry point.
+ *
+ ****************************************************************************/
+
+void __start(void)
+{
+  const uint32_t *src;
+  uint32_t *dest;
+
+  /* Configure the uart so that we can get debug output as soon as possible */
+
+  lpc17_clockconfig();
+  lpc17_lowsetup();
+  showprogress('A');
+
+  /* Clear .bss.  We'll do this inline (vs. calling memset) just to be
+   * certain that there are no issues with the state of global variables.
+   */
+
+  for (dest = &_sbss; dest < &_ebss; )
+    {
+      *dest++ = 0;
+    }
+  showprogress('B');
+
+  /* Move the intialized data section from his temporary holding spot in
+   * FLASH into the correct place in SRAM.  The correct place in SRAM is
+   * give by _sdata and _edata.  The temporary location is in FLASH at the
+   * end of all of the other read-only data (.text, .rodata) at _eronly.
+   */
+
+  for (src = &_eronly, dest = &_sdata; dest < &_edata; )
+    {
+      *dest++ = *src++;
+    }
+  showprogress('C');
+
+  /* Perform early serial initialization */
+
+#ifdef CONFIG_USE_EARLYSERIALINIT
+  up_earlyserialinit();
+#endif
+  showprogress('D');
+
+  /* Initialize onboard resources */
+
+  lpc17_boardinitialize();
+  showprogress('E');
+
+  /* Then start NuttX */
+
+  showprogress('\r');
+  showprogress('\n');
+  os_start();
+
+  /* Shouldn't get here */
+
+  for(;;);
+}
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_vectors.S b/nuttx/arch/arm/src/lpc17xx/lpc17_vectors.S
new file mode 100755
index 000000000..fc69e7dd8
--- /dev/null
+++ b/nuttx/arch/arm/src/lpc17xx/lpc17_vectors.S
@@ -0,0 +1,349 @@
+/************************************************************************************************

+ * arch/arm/src/lpc17xx/lpc17_vectors.S

+ * arch/arm/src/chip/lpc17_vectors.S

+ *

+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.

+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in

+ *    the documentation and/or other materials provided with the

+ *    distribution.

+ * 3. Neither the name NuttX nor the names of its contributors may be

+ *    used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS

+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN

+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

+ * POSSIBILITY OF SUCH DAMAGE.

+ *

+ ************************************************************************************************/

+

+/************************************************************************************************

+ * Included Files

+ ************************************************************************************************/

+

+#include <nuttx/config.h>

+#include <arch/irq.h>

+

+/************************************************************************************************

+ * Preprocessor Definitions

+ ************************************************************************************************/

+

+/* Memory Map:

+ *

+ * 0x0000:0000 - Beginning of FLASH. Address of vectors

+ * 0x0003:ffff - End of flash

+ * 0x1000:0000 - Start of CPU SRAM and start of .data (_sdata)

+ *             - End of .data (_edata) and start of .bss (_sbss)

+ *             - End of .bss (_ebss) and bottom of idle stack

+ *             - _ebss + CONFIG_IDLETHREAD_STACKSIZE = end of idle stack, start of heap. NOTE

+ *               that the ARM uses a decrement before store stack so that the correct initial

+ *               value is the end of the stack + 4;

+ * 0x1000:7fff - End of CPU SRAM and end of heap (1st region)

+ */

+

+#define IDLE_STACK      (_ebss+CONFIG_IDLETHREAD_STACKSIZE)

+#define HEAP_BASE       (_ebss+CONFIG_IDLETHREAD_STACKSIZE)

+

+/* The Cortex-M3 return from interrupt is unusual.  We provide the following special

+ * address to the BX instruction.  The particular value also forces a return to

+ * thread mode and covers state from the main stack point, the MSP (vs. the MSP).

+ */

+

+#define EXC_RETURN      0xfffffff9

+

+/************************************************************************************************

+ * Global Symbols

+ ************************************************************************************************/

+

+	.globl		__start

+

+	.syntax		unified

+	.thumb

+	.file		"lpc17_vectors.S"

+

+/************************************************************************************************

+ * Macros

+ ************************************************************************************************/

+

+/* On entry into an IRQ, the hardware automatically saves the xPSR, PC, LR, R12, R0-R3

+ * registers on the stack, then branches to an instantantiation of the following

+ * macro.  This macro simply loads the IRQ number into R0, then jumps to the common

+ * IRQ handling logic.

+ */

+

+	.macro	HANDLER, label, irqno

+	.thumb_func

+\label:

+	mov	r0, #\irqno

+	b	lpc17_common

+	.endm

+

+/************************************************************************************************

+ * Vectors

+ ************************************************************************************************/

+

+	.section	.vectors, "ax"

+	.code		16

+	.align		2

+	.globl		lpc17_vectors

+	.type		lpc17_vectors, function

+

+lpc17_vectors:

+

+/* Processor Exceptions */

+

+	.word	IDLE_STACK			/* Vector  0: Reset stack pointer */

+	.word	__start				/* Vector  1: Reset vector */

+	.word	lpc17_nmi			/* Vector  2: Non-Maskable Interrupt (NMI) */

+	.word	lpc17_hardfault		/* Vector  3: Hard fault */

+	.word	lpc17_mpu			/* Vector  4: Memory management (MPU) */

+	.word	lpc17_busfault		/* Vector  5: Bus fault */

+	.word	lpc17_usagefault	/* Vector  6: Usage fault */

+	.word	lpc17_reserved		/* Vector  7: Reserved */

+	.word	lpc17_reserved		/* Vector  8: Reserved */

+	.word	lpc17_reserved		/* Vector  9: Reserved */

+	.word	lpc17_reserved		/* Vector 10: Reserved */

+	.word	lpc17_svcall		/* Vector 11: SVC call */

+	.word	lpc17_dbgmonitor	/* Vector 12: Debug monitor */

+	.word	lpc17_reserved		/* Vector 13: Reserved */

+	.word	lpc17_pendsv		/* Vector 14: Pendable system service request */

+	.word	lpc17_systick		/* Vector 15: System tick */

+

+/* External Interrupts */

+

+	.word	lpc17_wdt		/* Vector 16+0:  Watchdog timer */

+	.word	lpc17_tmr0		/* Vector 16+1:  Timer 0 */

+	.word	lpc17_tmr1		/* Vector 16+2:  Timer 1 */

+	.word	lpc17_tmr2		/* Vector 16+3:  Timer 2 */

+	.word	lpc17_tmr3		/* Vector 16+4:  Timer 3 */

+	.word	lpc17_uart0		/* Vector 16+5:  UART 0 */

+	.word	lpc17_uart1		/* Vector 16+6:  UART 1 */

+	.word	lpc17_uart2		/* Vector 16+7:  UART 2 */

+	.word	lpc17_uart3		/* Vector 16+8:  UART 3 */

+	.word	lpc17_pwm1		/* Vector 16+9:  PWM */

+	.word	lpc17_i2c0		/* Vector 16+10: I2C 0 */

+	.word	lpc17_i2c1		/* Vector 16+11: I2C 1 */

+	.word	lpc17_i2c2		/* Vector 16+12: I2C 2 */

+	.word	lpc17_spif		/* Vector 16+13: SPI */

+	.word	lpc17_ssp0		/* Vector 16+14: SSP 0 */

+	.word	lpc17_ssp1		/* Vector 16+15: SSP 1 */

+	.word	lpc17_pll0		/* Vector 16+16: PLL 0 */

+	.word	lpc17_rtc		/* Vector 16+17: Real time clock */

+	.word	lpc17_eint0		/* Vector 16+18: External interrupt 0 */

+	.word	lpc17_eint1		/* Vector 16+19: External interrupt 1 */

+	.word	lpc17_eint2		/* Vector 16+20: External interrupt 2 */

+	.word	lpc17_eint3		/* Vector 16+21: External interrupt 3 */

+	.word	lpc17_adc		/* Vector 16+22: A/D Converter */

+	.word	lpc17_bod		/* Vector 16+23: Brown Out detect */

+	.word	lpc17_usb		/* Vector 16+24: USB */

+	.word	lpc17_can		/* Vector 16+25: CAN */

+	.word	lpc17_gpdma		/* Vector 16+26: GPDMA */

+	.word	lpc17_i2s		/* Vector 16+27: I2S */

+	.word	lpc17_eth		/* Vector 16+28: Ethernet */

+	.word	lpc17_ritint		/* Vector 16+29: Repetitive Interrupt Timer */

+	.word	lpc17_mcpwm		/* Vector 16+30: Motor Control PWM */

+	.word	lpc17_qei		/* Vector 16+31: Quadrature Encoder */

+	.word	lpc17_pll1		/* Vector 16+32: PLL 1 */

+	.word	lpc17_usbact		/* Vector 16+33: USB Activity Interrupt */

+	.word	lpc17_canact		/* Vector 16+34: CAN Activity Interrupt */

+	.size	lpc17_vectors, .-lpc17_vectors

+

+/************************************************************************************************

+ * .text

+ ************************************************************************************************/

+

+	.text

+        .type   handlers, function

+        .thumb_func

+handlers:

+	HANDLER	lpc17_reserved, LPC17_IRQ_RESERVED	/* Unexpected/reserved vector */

+	HANDLER lpc17_nmi, LPC17_IRQ_NMI		/* Vector  2: Non-Maskable Interrupt (NMI) */

+	HANDLER lpc17_hardfault, LPC17_IRQ_HARDFAULT	/* Vector  3: Hard fault */

+	HANDLER lpc17_mpu, LPC17_IRQ_MPU		/* Vector  4: Memory management (MPU) */

+	HANDLER lpc17_busfault, LPC17_IRQ_BUSFAULT	/* Vector  5: Bus fault */

+	HANDLER lpc17_usagefault, LPC17_IRQ_USAGEFAULT	/* Vector  6: Usage fault */

+	HANDLER lpc17_svcall, LPC17_IRQ_SVCALL		/* Vector 11: SVC call */

+	HANDLER lpc17_dbgmonitor, LPC17_IRQ_DBGMONITOR	/* Vector 12: Debug Monitor */

+	HANDLER lpc17_pendsv, LPC17_IRQ_PENDSV		/* Vector 14: Penable system service request */

+	HANDLER lpc17_systick, LPC17_IRQ_SYSTICK	/* Vector 15: System tick */

+

+	HANDLER lpc17_wdt, LPC17_IRQ_WDT		/* Vector 16+0:  Watchdog timer */

+	HANDLER lpc17_tmr0, LPC17_IRQ_TMR0		/* Vector 16+1:  Timer 0 */

+	HANDLER lpc17_tmr1, LPC17_IRQ_TMR1 		/* Vector 16+2:  Timer 1 */

+	HANDLER lpc17_tmr2, LPC17_IRQ_TMR2 		/* Vector 16+3:  Timer 2 */

+	HANDLER lpc17_tmr3, LPC17_IRQ_TMR3 		/* Vector 16+4:  Timer 3 */

+	HANDLER lpc17_uart0, LPC17_IRQ_UART0 		/* Vector 16+5:  UART 0 */

+	HANDLER lpc17_uart1, LPC17_IRQ_UART1		/* Vector 16+6:  UART 1 */

+	HANDLER lpc17_uart2, LPC17_IRQ_UART2		/* Vector 16+7:  UART 2 */

+	HANDLER lpc17_uart3, LPC17_IRQ_UART3		/* Vector 16+8:  UART 3 */

+	HANDLER lpc17_pwm1, LPC17_IRQ_PWM1		/* Vector 16+9:  PWM 1 */

+	HANDLER lpc17_i2c0, LPC17_IRQ_I2C0		/* Vector 16+10: I2C 0 */

+	HANDLER lpc17_i2c1, LPC17_IRQ_I2C1		/* Vector 16+11: I2C 1 */

+	HANDLER lpc17_i2c2, LPC17_IRQ_I2C2 		/* Vector 16+12: I2C 2 */

+	HANDLER lpc17_spif, LPC17_IRQ_SPIF		/* Vector 16+13: SPI */

+	HANDLER lpc17_ssp0, LPC17_IRQ_SSP0		/* Vector 16+14: SSP 0 */

+	HANDLER lpc17_ssp1, LPC17_IRQ_SSP1 		/* Vector 16+15: SSP 1 */

+	HANDLER lpc17_pll0, LPC17_IRQ_PLL0		/* Vector 16+16: PLL 0 */

+	HANDLER lpc17_rtc, LPC17_IRQ_RTC		/* Vector 16+17: Real time clock */

+	HANDLER lpc17_eint0, LPC17_IRQ_EINT0		/* Vector 16+18: External interrupt 0 */

+	HANDLER lpc17_eint1, LPC17_IRQ_EINT1		/* Vector 16+19: External interrupt 1 */

+	HANDLER lpc17_eint2, LPC17_IRQ_EINT2 		/* Vector 16+20: External interrupt 2 */

+	HANDLER lpc17_eint3, LPC17_IRQ_EINT3		/* Vector 16+21: External interrupt 3 */

+	HANDLER lpc17_adc, LPC17_IRQ_ADC 		/* Vector 16+22: A/D Converter */

+	HANDLER lpc17_bod, LPC17_IRQ_BOD		/* Vector 16+23: Brown Out detect */

+	HANDLER lpc17_usb, LPC17_IRQ_USB		/* Vector 16+24: USB */

+	HANDLER lpc17_can, LPC17_IRQ_CAN		/* Vector 16+25: CAN */

+	HANDLER lpc17_gpdma, LPC17_IRQ_GPDMA		/* Vector 16+26: GPDMA */

+	HANDLER lpc17_i2s, LPC17_IRQ_I2S		/* Vector 16+27: I2S */

+	HANDLER lpc17_eth, LPC17_IRQ_ETH		/* Vector 16+28: Ethernet */

+	HANDLER lpc17_ritint, LPC17_IRQ_RITINT		/* Vector 16+29: Repetitive Interrupt Timer */

+	HANDLER lpc17_mcpwm, LPC17_IRQ_MCPWM 		/* Vector 16+30: Motor Control PWM */

+	HANDLER lpc17_qei, LPC17_IRQ_QEI 		/* Vector 16+31: Quadrature Encoder */

+	HANDLER lpc17_pll1, LPC17_IRQ_PLL1		/* Vector 16+32: PLL 1 */

+	HANDLER lpc17_usbact, LPC17_IRQ_USBACT		/* Vector 16+33: USB Activity Interrupt */

+	HANDLER lpc17_canact, LPC17_IRQ_CANACT  	/* Vector 16+34: CAN Activity Interrupt */

+

+/* Common IRQ handling logic.  On entry here, the stack is like the following:

+ *

+ *      REG_XPSR

+ *      REG_R15

+ *      REG_R14

+ *      REG_R12

+ *      REG_R3

+ *      REG_R2

+ *      REG_R1

+ * MSP->REG_R0

+ *

+ * and R0 contains the IRQ number

+ */

+

+lpc17_common:

+

+	/* Complete the context save */

+

+	mrs		r1, msp					/* R1=The main stack pointer */

+	mov		r2, r1					/* R2=Copy of the main stack pointer */

+	add		r2, #HW_XCPT_SIZE		/* R2=MSP before the interrupt was taken */

+	mrs		r3, primask				/* R3=Current PRIMASK setting */

+	stmdb	r1!, {r2-r11}			/* Save the remaining registers plus the SP value */

+

+	/* Disable interrupts, select the stack to use for interrupt handling

+	 * and call up_doirq to handle the interrupt

+	 */

+

+	cpsid	i						/* Disable further interrupts */

+

+	/* If CONFIG_ARCH_INTERRUPTSTACK is defined, we will use a special interrupt

+	 * stack pointer.  The way that this is done here prohibits nested interrupts!

+	 * Otherwise, we will re-use the main stack for interrupt level processing.

+	 */

+

+#ifdef CONFIG_ARCH_INTERRUPTSTACK

+	ld		sp, #up_interruptstack_base

+	str		r1, [sp, #-4]!			/* Save the MSP on the interrupt stack */

+	bl		up_doirq				/* R0=IRQ, R1=register save (msp) */

+	ldr		r1, [sp, #+4]!			/* Recover R1=main stack pointer */

+#else

+	mov		sp, r1					/* We are using the main stack pointer */

+	bl		up_doirq				/* R0=IRQ, R1=register save (msp) */

+	mov		r1, sp					/* Recover R1=main stack pointer */

+#endif

+

+	/* On return from up_doirq, R0 will hold a pointer to register context

+	 * array to use for the interrupt return.  If that return value is the same

+	 * as current stack pointer, then things are relatively easy.

+	 */

+

+	cmp		r0, r1					/* Context switch? */

+	beq		1f						/* Branch if no context switch */

+

+	/* We are returning with a pending context switch.  This case is different

+	 * because in this case, the register save structure does not lie on the

+	 * stack but, rather, are within a TCB structure.  We'll have to copy some

+	 * values to the stack.

+	 */

+

+	add	r1, r0, #SW_XCPT_SIZE		/* R1=Address of HW save area in reg array */

+	ldmia	r1, {r4-r11}			/* Fetch eight registers in HW save area */

+	ldr	r1, [r0, #(4*REG_SP)]		/* R1=Value of SP before interrupt */

+	stmdb	r1!, {r4-r11}			/* Store eight registers in HW save area */

+	ldmia	r0, {r2-r11}			/* Recover R4-R11 + 2 temp values */

+	b		2f						/* Re-join common logic */

+

+	/* We are returning with no context switch.  We simply need to "unwind"

+	 * the same stack frame that we created

+	 */

+1:

+	ldmia	r1!, {r2-r11}			/* Recover R4-R11 + 2 temp values */

+2:

+	msr		msp, r1					/* Recover the return MSP value */

+

+	/* Do we need to restore interrupts? */

+

+	tst		r3, #1					/* PRIMASK bit 1=1 means that interrupts are masked */

+	bne		3f

+	cpsie	i						/* Restore interrupts */

+

+	/* Always return with R14 containing the special value that will: (1)

+	 * return to thread mode, and (2) continue to use the MSP

+	 */

+3:

+	ldr		r14, =EXC_RETURN		/* Load the special value */

+	bx		r14						/* And return */

+	.size	handlers, .-handlers

+

+/************************************************************************************************

+ *  Name: up_interruptstack/g_userstack

+ *

+ * Description:

+ *   Shouldn't happen

+ *

+ ************************************************************************************************/

+

+#if CONFIG_ARCH_INTERRUPTSTACK > 3

+        .bss

+        .align  4

+up_interruptstack:

+        .skip   (CONFIG_ARCH_INTERRUPTSTACK & ~3)

+up_interruptstack_base:

+        .size   up_interruptstack, .-up_interruptstack

+#endif

+

+/************************************************************************************************

+ * .rodata

+ ************************************************************************************************/

+

+	.section	.rodata, "a"

+

+/* Variables: _sbss is the start of the BSS region (see ld.script) _ebss is the end

+ * of the BSS regsion (see ld.script). The idle task stack starts at the end of BSS

+ * and is of size CONFIG_IDLETHREAD_STACKSIZE.  The IDLE thread is the thread that

+ * the system boots on and, eventually, becomes the idle, do nothing task that runs

+ * only when there is nothing else to run.  The heap continues from there until the

+ * end of memory.  See g_heapbase below.

+ */

+

+        .globl  g_heapbase

+        .type   g_heapbase, object

+g_heapbase:

+        .word   HEAP_BASE

+        .size   g_heapbase, .-g_heapbase

+

+        .end

diff --git a/nuttx/configs/README.txt b/nuttx/configs/README.txt
index 8a1b1a020..bbfe9946a 100644
--- a/nuttx/configs/README.txt
+++ b/nuttx/configs/README.txt
@@ -671,6 +671,11 @@ configs/ntosd-dm320
     STATUS: This port is code complete, verified, and included in the
     NuttX 0.2.1 release.
 
+configs/nucleus2g
+    This port uses the Nucleus 2G board (with Babel CAN board).  This board
+    features an NXP LPC1768 processor.  See the 2G website (http://www.2g-eng.com/)
+    for more information about the Nucleus 2G.
+
 configs/olimex-lpc2378
     This port uses the Olimex Olimex-lpc2378 board arm-elf toolchain* under
     Linux or Cygwin.  STATUS: ostest and NSH configurations available.
diff --git a/nuttx/configs/nucleus2g/include/board.h b/nuttx/configs/nucleus2g/include/board.h
new file mode 100755
index 000000000..058b50319
--- /dev/null
+++ b/nuttx/configs/nucleus2g/include/board.h
@@ -0,0 +1,99 @@
+/************************************************************************************
+ * configs/nucleus2g/include/board.h
+ * include/arch/board/board.h
+ *
+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_BOARD_BOARD_H
+#define __ARCH_BOARD_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+
+/* LED definitions ******************************************************************/
+
+#define LED_STARTED                0
+#define LED_HEAPALLOCATE           1
+#define LED_IRQSENABLED            2
+#define LED_STACKCREATED           3
+
+#define LED_INIRQ                  4
+#define LED_SIGNAL                 5
+#define LED_ASSERTION              6
+#define LED_PANIC                  7
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+/************************************************************************************
+ * Name: lpc17_boardinitialize
+ *
+ * Description:
+ *   All LPC17xx architectures must provide the following entry point.  This entry point
+ *   is called early in the intitialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+EXTERN void lpc17_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __ARCH_BOARD_BOARD_H */
diff --git a/nuttx/configs/nucleus2g/ostest/Make.defs b/nuttx/configs/nucleus2g/ostest/Make.defs
new file mode 100755
index 000000000..4d44dedd7
--- /dev/null
+++ b/nuttx/configs/nucleus2g/ostest/Make.defs
@@ -0,0 +1,168 @@
+############################################################################
+# configs/nucleus2g/ostest/Make.defs
+#
+#   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+
+# Setup for the selected toolchain
+
+ifeq ($(CONFIG_LPC17_CODESOURCERYW),y)
+  # CodeSourcery under Windows
+  CROSSDEV = arm-none-eabi-
+  WINTOOL = y
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_LPC17_CODESOURCERYL),y)
+  # CodeSourcery under Linux
+  CROSSDEV = arm-none-eabi-
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+  MAXOPTIMIZATION = -O2
+endif
+ifeq ($(CONFIG_LPC17_DEVKITARM),y)
+  # devkitARM under Windows
+  CROSSDEV = arm-eabi-
+  WINTOOL = y
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_LPC17_RAISONANCE),y)
+  # Raisonance RIDE7 under Windows
+  CROSSDEV = arm-none-eabi-
+  WINTOOL = y
+  ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
+endif
+ifeq ($(CONFIG_LPC17_BUILDROOT),y)
+  # NuttX buildroot under Linux or Cygwin
+  CROSSDEV = arm-elf-
+  ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
+  MAXOPTIMIZATION = -Os
+endif
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/winlink.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mknulldeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script}"
+  MAXOPTIMIZATION = -O2
+else
+  # Linux/Cygwin-native toolchain 
+  MKDEP = $(TOPDIR)/tools/mkdeps.sh
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(CROSSDEV)ar rcs
+NM = $(CROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ("${CONFIG_DEBUG_SYMBOLS}","y")
+  ARCHOPTIMIZATION = -g
+else
+  ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
+ARCHWARNINGSXX = -Wall -Wshadow
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+define PREPROCESS
+	@echo "CPP: $1->$2"
+	@$(CPP) $(CPPFLAGS) $1 -o $2
+endef
+
+define COMPILE
+	@echo "CC: $1"
+	@$(CC) -c $(CFLAGS) $1 -o $2
+endef
+
+define COMPILEXX
+	@echo "CXX: $1"
+	@$(CXX) -c $(CXXFLAGS) $1 -o $2
+endef
+
+define ASSEMBLE
+	@echo "AS: $1"
+	@$(CC) -c $(AFLAGS) $1 -o $2
+endef
+
+define ARCHIVE
+	echo "AR: $2"; \
+	$(AR) $1 $2 || { echo "$(AR) $1 $2 FAILED!" ; exit 1 ; }
+endef
+
+define CLEAN
+	@rm -f *.o *.a
+endef
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
+HOSTLDFLAGS =
+
diff --git a/nuttx/configs/nucleus2g/ostest/defconfig b/nuttx/configs/nucleus2g/ostest/defconfig
new file mode 100755
index 000000000..49c351c5d
--- /dev/null
+++ b/nuttx/configs/nucleus2g/ostest/defconfig
@@ -0,0 +1,778 @@
+############################################################################
+# configs/nucleus2g/ostest/defconfig
+#
+#   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+#
+# architecture selection
+#
+# CONFIG_ARCH - identifies the arch subdirectory and, hence, the
+#   processor architecture.
+# CONFIG_ARCH_family - for use in C code.  This identifies the
+#   particular chip family that the architecture is implemented
+#   in.
+# CONFIG_ARCH_architecture - for use in C code.  This identifies the
+#   specific architecture within the chip familyl.
+# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
+# CONFIG_ARCH_CHIP_name - For use in C code
+# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
+#   the board that supports the particular chip or SoC.
+# CONFIG_ARCH_BOARD_name - for use in C code
+# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
+# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
+# CONFIG_DRAM_SIZE - Describes the installed DRAM.
+# CONFIG_DRAM_START - The start address of DRAM (physical)
+# CONFIG_DRAM_END - Last address+1 of installed RAM
+# CONFIG_ARCH_IRQPRIO - The ST32F103Z supports interrupt prioritization
+# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
+#   stack. If defined, this symbol is the size of the interrupt
+#   stack in bytes.  If not defined, the user task stacks will be
+#   used during interrupt handling.
+# CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
+# CONFIG_ARCH_BOOTLOADER - Set if you are using a bootloader.
+# CONFIG_ARCH_LEDS -  Use LEDs to show state. Unique to board architecture.
+# CONFIG_ARCH_BUTTONS -  Enable support for buttons. Unique to board architecture.
+# CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
+#   cause a 100 second delay during boot-up.  This 100 second delay
+#   serves no purpose other than it allows you to calibrate
+#   CONFIG_BOARD_LOOPSPERMSEC.  You simply use a stop watch to measure
+#   the 100 second delay then adjust CONFIG_BOARD_LOOPSPERMSEC until
+#   the delay actually is 100 seconds.
+# CONFIG_ARCH_DMA - Support DMA initialization
+#
+CONFIG_ARCH=arm
+CONFIG_ARCH_ARM=y
+CONFIG_ARCH_CORTEXM3=y
+CONFIG_ARCH_CHIP=lpc17xx
+CONFIG_ARCH_CHIP_LPC1768=y
+CONFIG_ARCH_BOARD=nucleus2g
+CONFIG_ARCH_BOARD_NUCLEUS2G=y
+CONFIG_BOARD_LOOPSPERMSEC=5483
+CONFIG_DRAM_SIZE=0x00008000
+CONFIG_DRAM_START=0x10000000
+CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
+CONFIG_ARCH_IRQPRIO=y
+CONFIG_ARCH_INTERRUPTSTACK=n
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_ARCH_BOOTLOADER=n
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_BUTTONS=n
+CONFIG_ARCH_CALIBRATION=n
+CONFIG_ARCH_DMA=n
+
+#
+# Identify toolchain and linker options
+#
+CONFIG_LPC17_CODESOURCERYW=n
+CONFIG_LPC17_CODESOURCERYL=n
+CONFIG_LPC17_DEVKITARM=n
+CONFIG_LPC17_RAISONANCE=n
+CONFIG_LPC17_BUILDROOT=y
+CONFIG_LPC17_DFU=y
+
+#
+#  Individual subsystems can be enabled:
+#
+# Individual subsystems can be enabled:
+CONFIG_LP17_ETHERNET=n
+CONFIG_LP17_USBHOST=n
+CONFIG_LP17_USBOTG=n
+CONFIG_LP17_USBDEV=n
+CONFIG_LP17_CAN1=n
+CONFIG_LP17_CAN2=n
+CONFIG_LP17_SPI=n
+CONFIG_LP17_SSP0=n
+CONFIG_LP17_SSP1=n
+CONFIG_LP17_I2C0=n
+CONFIG_LP17_I2C1=n
+CONFIG_LP17_I2S=n
+CONFIG_LP17_TMR0=n
+CONFIG_LP17_TMR1=n
+CONFIG_LP17_TMR2=n
+CONFIG_LP17_TMR3=n
+CONFIG_LP17_RIT=n
+CONFIG_LP17_PWM=n
+CONFIG_LP17_MCPWM=n
+CONFIG_LP17_QEI=n
+CONFIG_LP17_RTC=n
+CONFIG_LP17_WDT=n
+CONFIG_LP17_ADC=n
+CONFIG_LP17_DAC=n
+CONFIG_LP17_GPDMA=n
+
+#
+# LPC17xx specific serial device driver settings
+#
+# CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the
+#   console and ttys0 (default is the UART1).
+# CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
+#   This specific the size of the receive buffer
+# CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
+#   being sent.  This specific the size of the transmit buffer
+# CONFIG_UARTn_BAUD - The configure BAUD of the UART.  Must be
+# CONFIG_UARTn_BITS - The number of bits.  Must be either 7 or 8.
+# CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
+# CONFIG_UARTn_2STOP - Two stop bits
+#
+CONFIG_UART1_SERIAL_CONSOLE=y
+CONFIG_UART2_SERIAL_CONSOLE=n
+CONFIG_UART3_SERIAL_CONSOLE=n
+CONFIG_UART4_SERIAL_CONSOLE=n
+
+CONFIG_UART1_TXBUFSIZE=256
+CONFIG_UART2_TXBUFSIZE=256
+CONFIG_UART3_TXBUFSIZE=256
+CONFIG_UART4_TXBUFSIZE=256
+
+CONFIG_UART1_RXBUFSIZE=256
+CONFIG_UART2_RXBUFSIZE=256
+CONFIG_UART3_RXBUFSIZE=256
+CONFIG_UART4_RXBUFSIZE=256
+
+CONFIG_UART1_BAUD=115200
+CONFIG_UART2_BAUD=115200
+CONFIG_UART3_BAUD=115200
+CONFIG_UART4_BAUD=115200
+
+CONFIG_UART1_BITS=8
+CONFIG_UART2_BITS=8
+CONFIG_UART3_BITS=8
+CONFIG_UART4_BITS=8
+
+CONFIG_UART1_PARITY=0
+CONFIG_UART2_PARITY=0
+CONFIG_UART3_PARITY=0
+CONFIG_UART4_PARITY=0
+
+CONFIG_UART1_2STOP=0
+CONFIG_UART2_2STOP=0
+CONFIG_UART3_2STOP=0
+CONFIG_UART4_2STOP=0
+
+#
+# General build options
+#
+# CONFIG_RRLOAD_BINARY - make the rrload binary format used with
+#   BSPs from www.ridgerun.com using the tools/mkimage.sh script
+# CONFIG_INTELHEX_BINARY - make the Intel HEX binary format
+#   used with many different loaders using the GNU objcopy program
+#   Should not be selected if you are not using the GNU toolchain.
+# CONFIG_MOTOROLA_SREC - make the Motorola S-Record binary format
+#   used with many different loaders using the GNU objcopy program
+#   Should not be selected if you are not using the GNU toolchain.
+# CONFIG_RAW_BINARY - make a raw binary format file used with many
+#   different loaders using the GNU objcopy program.  This option
+#   should not be selected if you are not using the GNU toolchain.
+# CONFIG_HAVE_LIBM - toolchain supports libm.a
+#
+CONFIG_RRLOAD_BINARY=n
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MOTOROLA_SREC=n
+CONFIG_RAW_BINARY=n
+CONFIG_HAVE_LIBM=n
+
+#
+# General OS setup
+#
+# CONFIG_EXAMPLE - identifies the subdirectory in examples
+#   that will be used in the build
+# CONFIG_DEBUG - enables built-in debug options
+# CONFIG_DEBUG_VERBOSE - enables verbose debug output
+# CONFIG_DEBUG_SYMBOLS - build without optimization and with
+#   debug symbols (needed for use with a debugger).
+# CONFIG_MM_REGIONS - If the architecture includes multiple
+#   regions of memory to allocate from, this specifies the
+#   number of memory regions that the memory manager must
+#   handle and enables the API mm_addregion(start, end);
+# CONFIG_ARCH_LOWPUTC - architecture supports low-level, boot
+#   time console output
+# CONFIG_TICKS_PER_MSEC - The default system timer is 100Hz
+#   or TICKS_PER_MSEC=10.  This setting may be defined to
+#   inform NuttX that the processor hardware is providing
+#   system timer interrupts at some interrupt interval other
+#   than 10 msec.
+# CONFIG_RR_INTERVAL - The round robin timeslice will be set
+#   this number of milliseconds;  Round robin scheduling can
+#   be disabled by setting this value to zero.
+# CONFIG_SCHED_INSTRUMENTATION - enables instrumentation in 
+#   scheduler to monitor system performance
+# CONFIG_TASK_NAME_SIZE - Spcifies that maximum size of a
+#   task name to save in the TCB.  Useful if scheduler
+#   instrumentation is selected.  Set to zero to disable.
+# CONFIG_START_YEAR, CONFIG_START_MONTH, CONFIG_START_DAY -
+#   Used to initialize the internal time logic.
+# CONFIG_GREGORIAN_TIME - Enables Gregorian time conversions.
+#   You would only need this if you are concerned about accurate
+#   time conversions in the past or in the distant future.
+# CONFIG_JULIAN_TIME - Enables Julian time conversions. You
+#   would only need this if you are concerned about accurate
+#   time conversion in the distand past.  You must also define
+#   CONFIG_GREGORIAN_TIME in order to use Julian time.
+# CONFIG_DEV_CONSOLE - Set if architecture-specific logic
+#   provides /dev/console.  Enables stdout, stderr, stdin.
+# CONFIG_DEV_LOWCONSOLE - Use the simple, low-level serial console
+#   driver (minimul support)
+# CONFIG_MUTEX_TYPES: Set to enable support for recursive and
+#   errorcheck mutexes. Enables pthread_mutexattr_settype().
+# CONFIG_PRIORITY_INHERITANCE : Set to enable support for priority
+#   inheritance on mutexes and semaphores. 
+# CONFIG_SEM_PREALLOCHOLDERS: This setting is only used if priority
+#   inheritance is enabled.  It defines the maximum number of
+#   different threads (minus one) that can take counts on a
+#   semaphore with priority inheritance support.  This may be 
+#   set to zero if priority inheritance is disabled OR if you
+#   are only using semaphores as mutexes (only one holder) OR
+#   if no more than two threads participate using a counting
+#   semaphore.
+# CONFIG_SEM_NNESTPRIO.  If priority inheritance is enabled,
+#   then this setting is the maximum number of higher priority
+#   threads (minus 1) than can be waiting for another thread
+#   to release a count on a semaphore.  This value may be set
+#   to zero if no more than one thread is expected to wait for
+#   a semaphore.
+# CONFIG_FDCLONE_DISABLE. Disable cloning of all file descriptors
+#   by task_create() when a new task is started.  If set, all
+#   files/drivers will appear to be closed in the new task.
+# CONFIG_FDCLONE_STDIO. Disable cloning of all but the first
+#   three file descriptors (stdin, stdout, stderr) by task_create()
+#   when a new task is started. If set, all files/drivers will
+#   appear to be closed in the new task except for stdin, stdout,
+#   and stderr.
+# CONFIG_SDCLONE_DISABLE. Disable cloning of all socket
+#   desciptors by task_create() when a new task is started. If
+#   set, all sockets will appear to be closed in the new task.
+# CONFIG_NXFLAT. Enable support for the NXFLAT binary format.
+#  This format will support execution of NuttX binaries located
+#  in a ROMFS filesystem (see examples/nxflat).
+# CONFIG_SCHED_WORKQUEUE.  Create a dedicated "worker" thread to
+#  handle delayed processing from interrupt handlers.  This feature
+#  is required for some drivers but, if there are not complaints,
+#  can be safely disabled.  The worker thread also performs
+#  garbage collection -- completing any delayed memory deallocations
+#  from interrupt handlers.  If the worker thread is disabled,
+#  then that clean will be performed by the IDLE thread instead
+#  (which runs at the lowest of priority and may not be appropriate
+#  if memory reclamation is of high priority).  If CONFIG_SCHED_WORKQUEUE
+#  is enabled, then the following options can also be used:
+# CONFIG_SCHED_WORKPRIORITY - The execution priority of the worker
+#  thread.  Default: 50
+# CONFIG_SCHED_WORKPERIOD - How often the worker thread checks for
+#  work in units of microseconds.  Default: 50*1000 (50 MS).
+# CONFIG_SCHED_WORKSTACKSIZE - The stack size allocated for the worker
+#  thread.  Default: CONFIG_IDLETHREAD_STACKSIZE.
+# CONFIG_SIG_SIGWORK - The signal number that will be used to wake-up
+#  the worker thread.  Default: 4
+#
+CONFIG_EXAMPLE=ostest
+CONFIG_DEBUG=n
+CONFIG_DEBUG_VERBOSE=n
+CONFIG_DEBUG_SYMBOLS=n
+CONFIG_MM_REGIONS=1
+CONFIG_ARCH_LOWPUTC=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_INSTRUMENTATION=n
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_START_YEAR=2009
+CONFIG_START_MONTH=9
+CONFIG_START_DAY=21
+CONFIG_GREGORIAN_TIME=n
+CONFIG_JULIAN_TIME=n
+CONFIG_DEV_CONSOLE=y
+CONFIG_DEV_LOWCONSOLE=y
+CONFIG_MUTEX_TYPES=n
+CONFIG_PRIORITY_INHERITANCE=n
+CONFIG_SEM_PREALLOCHOLDERS=0
+CONFIG_SEM_NNESTPRIO=0
+CONFIG_FDCLONE_DISABLE=n
+CONFIG_FDCLONE_STDIO=n
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NXFLAT=n
+CONFIG_SCHED_WORKQUEUE=n
+CONFIG_SCHED_WORKPRIORITY=50
+CONFIG_SCHED_WORKPERIOD=(50*1000)
+CONFIG_SCHED_WORKSTACKSIZE=1024
+CONFIG_SIG_SIGWORK=4
+
+#
+# The following can be used to disable categories of
+# APIs supported by the OS.  If the compiler supports
+# weak functions, then it should not be necessary to
+# disable functions unless you want to restrict usage
+# of those APIs.
+#
+# There are certain dependency relationships in these
+# features.
+#
+# o mq_notify logic depends on signals to awaken tasks
+#   waiting for queues to become full or empty.
+# o pthread_condtimedwait() depends on signals to wake
+#   up waiting tasks.
+#
+CONFIG_DISABLE_CLOCK=n
+CONFIG_DISABLE_POSIX_TIMERS=n
+CONFIG_DISABLE_PTHREAD=n
+CONFIG_DISABLE_SIGNALS=n
+CONFIG_DISABLE_MQUEUE=n
+CONFIG_DISABLE_MOUNTPOINT=y
+CONFIG_DISABLE_ENVIRON=y
+CONFIG_DISABLE_POLL=y
+
+#
+# Misc libc settings
+#
+# CONFIG_NOPRINTF_FIELDWIDTH - sprintf-related logic is a
+#   little smaller if we do not support fieldwidthes
+#
+CONFIG_NOPRINTF_FIELDWIDTH=n
+
+#
+# Allow for architecture optimized implementations
+#
+# The architecture can provide optimized versions of the
+# following to improve system performance
+#
+CONFIG_ARCH_MEMCPY=n
+CONFIG_ARCH_MEMCMP=n
+CONFIG_ARCH_MEMMOVE=n
+CONFIG_ARCH_MEMSET=n
+CONFIG_ARCH_STRCMP=n
+CONFIG_ARCH_STRCPY=n
+CONFIG_ARCH_STRNCPY=n
+CONFIG_ARCH_STRLEN=n
+CONFIG_ARCH_BZERO=n
+CONFIG_ARCH_KMALLOC=n
+CONFIG_ARCH_KZMALLOC=n
+CONFIG_ARCH_KFREE=n
+
+#
+# Sizes of configurable things (0 disables)
+#
+# CONFIG_MAX_TASKS - The maximum number of simultaneously
+#   active tasks.  This value must be a power of two.
+# CONFIG_MAX_TASK_ARGS - This controls the maximum number of
+#   of parameters that a task may receive (i.e., maxmum value
+#   of 'argc')
+# CONFIG_NPTHREAD_KEYS - The number of items of thread-
+#   specific data that can be retained
+# CONFIG_NFILE_DESCRIPTORS - The maximum number of file
+#   descriptors (one for each open)
+# CONFIG_NFILE_STREAMS - The maximum number of streams that
+#   can be fopen'ed
+# CONFIG_NAME_MAX - The maximum size of a file name.
+# CONFIG_STDIO_BUFFER_SIZE - Size of the buffer to allocate
+#   on fopen. (Only if CONFIG_NFILE_STREAMS > 0)
+# CONFIG_NUNGET_CHARS - Number of characters that can be
+#   buffered by ungetc() (Only if CONFIG_NFILE_STREAMS > 0)
+# CONFIG_PREALLOC_MQ_MSGS - The number of pre-allocated message
+#   structures.  The system manages a pool of preallocated
+#   message structures to minimize dynamic allocations
+# CONFIG_MQ_MAXMSGSIZE - Message structures are allocated with
+#   a fixed payload size given by this settin (does not include
+#   other message structure overhead.
+# CONFIG_MAX_WDOGPARMS - Maximum number of parameters that
+#   can be passed to a watchdog handler
+# CONFIG_PREALLOC_WDOGS - The number of pre-allocated watchdog
+#   structures.  The system manages a pool of preallocated
+#   watchdog structures to minimize dynamic allocations
+# CONFIG_PREALLOC_TIMERS - The number of pre-allocated POSIX
+#   timer structures.  The system manages a pool of preallocated
+#   timer structures to minimize dynamic allocations.  Set to
+#   zero for all dynamic allocations.
+#
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_TASK_ARGS=4
+CONFIG_NPTHREAD_KEYS=4
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_STDIO_BUFFER_SIZE=256
+CONFIG_NUNGET_CHARS=2
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Filesystem configuration
+#
+# CONFIG_FS_FAT - Enable FAT filesystem support
+# CONFIG_FAT_SECTORSIZE - Max supported sector size
+# CONFIG_FS_ROMFS - Enable ROMFS filesystem support
+CONFIG_FS_FAT=n
+CONFIG_FS_ROMFS=n
+
+#
+# SPI-based MMC/SD driver
+#
+# CONFIG_MMCSD_NSLOTS
+#   Number of MMC/SD slots supported by the driver
+# CONFIG_MMCSD_READONLY
+#   Provide read-only access (default is read/write)
+# CONFIG_MMCSD_SPICLOCK - Maximum SPI clock to drive MMC/SD card.
+#   Default is 20MHz.
+#
+CONFIG_MMCSD_NSLOTS=1
+CONFIG_MMCSD_READONLY=n
+CONFIG_MMCSD_SPICLOCK=12500000
+
+#
+# Block driver buffering
+#
+# CONFIG_FS_READAHEAD
+#   Enable read-ahead buffering
+# CONFIG_FS_WRITEBUFFER
+#   Enable write buffering
+#
+CONFIG_FS_READAHEAD=n
+CONFIG_FS_WRITEBUFFER=n
+
+#
+# SDIO-based MMC/SD driver
+#
+# CONFIG_SDIO_DMA
+#   SDIO driver supports DMA
+# CONFIG_MMCSD_MMCSUPPORT
+#   Enable support for MMC cards
+# CONFIG_MMCSD_HAVECARDDETECT
+#   SDIO driver card detection is 100% accurate
+#
+CONFIG_SDIO_DMA=n
+CONFIG_MMCSD_MMCSUPPORT=n
+CONFIG_MMCSD_HAVECARDDETECT=n
+
+#
+# TCP/IP and UDP support via uIP
+# CONFIG_NET - Enable or disable all network features
+# CONFIG_NET_IPv6 - Build in support for IPv6
+# CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors per task/thread.
+# CONFIG_NET_SOCKOPTS - Enable or disable support for socket options
+# CONFIG_NET_BUFSIZE - uIP buffer size
+# CONFIG_NET_TCP - TCP support on or off
+# CONFIG_NET_TCP_CONNS - Maximum number of TCP connections (all tasks)
+# CONFIG_NET_TCP_READAHEAD_BUFSIZE - Size of TCP read-ahead buffers
+# CONFIG_NET_NTCP_READAHEAD_BUFFERS - Number of TCP read-ahead buffers (may be zero)
+# CONFIG_NET_TCPBACKLOG - Incoming connections pend in a backlog until
+#   accept() is called. The size of the backlog is selected when listen() is called.
+# CONFIG_NET_MAX_LISTENPORTS - Maximum number of listening TCP ports (all tasks)
+# CONFIG_NET_UDP - UDP support on or off
+# CONFIG_NET_UDP_CHECKSUMS - UDP checksums on or off
+# CONFIG_NET_UDP_CONNS - The maximum amount of concurrent UDP connections
+# CONFIG_NET_ICMP - ICMP ping response support on or off
+# CONFIG_NET_ICMP_PING - ICMP ping request support on or off
+# CONFIG_NET_PINGADDRCONF - Use "ping" packet for setting IP address
+# CONFIG_NET_STATISTICS - uIP statistics on or off
+# CONFIG_NET_RECEIVE_WINDOW - The size of the advertised receiver's window
+# CONFIG_NET_ARPTAB_SIZE - The size of the ARP table
+# CONFIG_NET_BROADCAST - Broadcast support
+# CONFIG_NET_LLH_LEN - The link level header length
+# CONFIG_NET_FWCACHE_SIZE - number of packets to remember when looking for duplicates
+#
+CONFIG_NET=n
+CONFIG_NET_IPv6=n
+CONFIG_NSOCKET_DESCRIPTORS=0
+CONFIG_NET_SOCKOPTS=y
+CONFIG_NET_BUFSIZE=420
+CONFIG_NET_TCP=n
+CONFIG_NET_TCP_CONNS=40
+CONFIG_NET_MAX_LISTENPORTS=40
+CONFIG_NET_UDP=n
+CONFIG_NET_UDP_CHECKSUMS=y
+#CONFIG_NET_UDP_CONNS=10
+CONFIG_NET_ICMP=n
+CONFIG_NET_ICMP_PING=n
+#CONFIG_NET_PINGADDRCONF=0
+CONFIG_NET_STATISTICS=y
+#CONFIG_NET_RECEIVE_WINDOW=
+#CONFIG_NET_ARPTAB_SIZE=8
+CONFIG_NET_BROADCAST=n
+#CONFIG_NET_LLH_LEN=14
+#CONFIG_NET_FWCACHE_SIZE=2
+
+#
+# UIP Network Utilities
+# CONFIG_NET_DHCP_LIGHT - Reduces size of DHCP
+# CONFIG_NET_RESOLV_ENTRIES - Number of resolver entries
+#
+CONFIG_NET_DHCP_LIGHT=n
+CONFIG_NET_RESOLV_ENTRIES=4
+
+#
+# USB Device Configuration
+#
+# CONFIG_USBDEV
+#   Enables USB device support
+# CONFIG_USBDEV_ISOCHRONOUS
+#   Build in extra support for isochronous endpoints
+# CONFIG_USBDEV_DUALSPEED
+#   Hardware handles high and full speed operation (USB 2.0)
+# CONFIG_USBDEV_SELFPOWERED
+#   Will cause USB features to indicate that the device is
+#   self-powered
+# CONFIG_USBDEV_MAXPOWER
+#   Maximum power consumption in mA
+# CONFIG_USBDEV_TRACE
+#   Enables USB tracing for debug
+# CONFIG_USBDEV_TRACE_NRECORDS
+#   Number of trace entries to remember
+#
+CONFIG_USBDEV=n
+CONFIG_USBDEV_ISOCHRONOUS=n
+CONFIG_USBDEV_DUALSPEED=n
+CONFIG_USBDEV_SELFPOWERED=y
+CONFIG_USBDEV_REMOTEWAKEUP=n
+CONFIG_USBDEV_MAXPOWER=100
+CONFIG_USBDEV_TRACE=n
+CONFIG_USBDEV_TRACE_NRECORDS=128
+
+#
+# USB Serial Device Configuration
+#
+# CONFIG_USBSER
+#   Enable compilation of the USB serial driver
+# CONFIG_USBSER_EPINTIN
+#   The logical 7-bit address of a hardware endpoint that supports
+#   interrupt IN operation
+# CONFIG_USBSER_EPBULKOUT
+#   The logical 7-bit address of a hardware endpoint that supports
+#   bulk OUT operation
+# CONFIG_USBSER_EPBULKIN
+#   The logical 7-bit address of a hardware endpoint that supports
+#   bulk IN operation
+# # CONFIG_USBSER_NWRREQS and CONFIG_USBSER_NRDREQS
+#   The number of write/read requests that can be in flight
+# CONFIG_USBSER_VENDORID and CONFIG_USBSER_VENDORSTR
+#   The vendor ID code/string
+# CONFIG_USBSER_PRODUCTID and CONFIG_USBSER_PRODUCTSTR
+#   The product ID code/string
+# CONFIG_USBSER_RXBUFSIZE and CONFIG_USBSER_TXBUFSIZE
+#   Size of the serial receive/transmit buffers
+#
+CONFIG_USBSER=n
+CONFIG_USBSER_EPINTIN=1
+CONFIG_USBSER_EPBULKOUT=2
+CONFIG_USBSER_EPBULKIN=3
+CONFIG_USBSER_NWRREQS=4
+CONFIG_USBSER_NRDREQS=4
+CONFIG_USBSER_VENDORID=0x067b
+CONFIG_USBSER_PRODUCTID=0x2303
+CONFIG_USBSER_VENDORSTR="Nuttx"
+CONFIG_USBSER_PRODUCTSTR="USBdev Serial"
+CONFIG_USBSER_RXBUFSIZE=512
+CONFIG_USBSER_TXBUFSIZE=512
+
+#
+# USB Storage Device Configuration
+#
+# CONFIG_USBSTRG
+#   Enable compilation of the USB storage driver
+# CONFIG_USBSTRG_EP0MAXPACKET
+#   Max packet size for endpoint 0
+# CONFIG_USBSTRG_EPBULKOUT and CONFIG_USBSTRG_EPBULKIN
+#   The logical 7-bit address of a hardware endpoints that support
+#   bulk OUT and IN operations
+# CONFIG_USBSTRG_NWRREQS and CONFIG_USBSTRG_NRDREQS
+#   The number of write/read requests that can be in flight
+# CONFIG_USBSTRG_BULKINREQLEN and CONFIG_USBSTRG_BULKOUTREQLEN
+#   The size of the buffer in each write/read request.  This
+#   value needs to be at least as large as the endpoint
+#   maxpacket and ideally as large as a block device sector.
+# CONFIG_USBSTRG_VENDORID and CONFIG_USBSTRG_VENDORSTR
+#   The vendor ID code/string
+# CONFIG_USBSTRG_PRODUCTID and CONFIG_USBSTRG_PRODUCTSTR
+#   The product ID code/string
+# CONFIG_USBSTRG_REMOVABLE
+#   Select if the media is removable
+#
+CONFIG_USBSTRG=n
+CONFIG_USBSTRG_EP0MAXPACKET=64
+CONFIG_USBSTRG_EPBULKOUT=2
+CONFIG_USBSTRG_EPBULKIN=5
+CONFIG_USBSTRG_NRDREQS=2
+CONFIG_USBSTRG_NWRREQS=2
+CONFIG_USBSTRG_BULKINREQLEN=256
+CONFIG_USBSTRG_BULKOUTREQLEN=256
+CONFIG_USBSTRG_VENDORID=0x584e
+CONFIG_USBSTRG_VENDORSTR="NuttX"
+CONFIG_USBSTRG_PRODUCTID=0x5342
+CONFIG_USBSTRG_PRODUCTSTR="USBdev Storage"
+CONFIG_USBSTRG_VERSIONNO=0x0399
+CONFIG_USBSTRG_REMOVABLE=y
+
+#
+# Settings for examples/uip
+#
+CONFIG_EXAMPLE_UIP_IPADDR=(10<<24|0<<16|0<<8|2)
+CONFIG_EXAMPLE_UIP_DRIPADDR=(10<<24|0<<16|0<<8|1)
+CONFIG_EXAMPLE_UIP_NETMASK=(255<<24|255<<16|255<<8|0)
+CONFIG_EXAMPLE_UIP_DHCPC=n
+
+#
+# Settings for examples/nettest
+CONFIG_EXAMPLE_NETTEST_SERVER=n
+CONFIG_EXAMPLE_NETTEST_PERFORMANCE=n
+CONFIG_EXAMPLE_NETTEST_NOMAC=n
+CONFIG_EXAMPLE_NETTEST_IPADDR=(10<<24|0<<16|0<<8|2)
+CONFIG_EXAMPLE_NETTEST_DRIPADDR=(10<<24|0<<16|0<<8|1)
+CONFIG_EXAMPLE_NETTEST_NETMASK=(255<<24|255<<16|255<<8|0)
+CONFIG_EXAMPLE_NETTEST_CLIENTIP=(10<<24|0<<16|0<<8|1)
+
+#
+# Settings for examples/ostest
+#
+CONFIG_EXAMPLES_OSTEST_LOOPS=1
+CONFIG_EXAMPLES_OSTEST_STACKSIZE=2048
+CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3
+
+#
+# Settings for examples/nsh
+#
+# CONFIG_EXAMPLES_NSH_FILEIOSIZE - Size of a static I/O buffer
+# CONFIG_EXAMPLES_NSH_STRERROR - Use strerror(errno)
+# CONFIG_EXAMPLES_NSH_LINELEN - Maximum length of one command line
+# CONFIG_EXAMPLES_NSH_STACKSIZE - Stack size to use for new threads.
+# CONFIG_EXAMPLES_NSH_NESTDEPTH - Max number of nested if-then[-else]-fi
+# CONFIG_EXAMPLES_NSH_DISABLESCRIPT - Disable scripting support
+# CONFIG_EXAMPLES_NSH_DISABLEBG - Disable background commands
+# CONFIG_EXAMPLES_NSH_ROMFSETC - Use startup script in /etc
+# CONFIG_EXAMPLES_NSH_CONSOLE - Use serial console front end
+# CONFIG_EXAMPLES_NSH_TELNET - Use telnetd console front end
+# CONFIG_EXAMPLES_NSH_ARCHINIT - Platform provides architecture
+#   specific initialization (nsh_archinitialize()).
+#
+# If CONFIG_EXAMPLES_NSH_TELNET is selected:
+# CONFIG_EXAMPLES_NSH_IOBUFFER_SIZE -- Telnetd I/O buffer size
+# CONFIG_EXAMPLES_NSH_DHCPC - Obtain address using DHCP
+# CONFIG_EXAMPLES_NSH_IPADDR - Provides static IP address
+# CONFIG_EXAMPLES_NSH_DRIPADDR - Provides static router IP address
+# CONFIG_EXAMPLES_NSH_NETMASK - Provides static network mask
+# CONFIG_EXAMPLES_NSH_NOMAC - Use a bogus MAC address
+#
+# If CONFIG_EXAMPLES_NSH_ROMFSETC is selected:
+# CONFIG_EXAMPLES_NSH_ROMFSMOUNTPT - ROMFS mountpoint
+# CONFIG_EXAMPLES_NSH_INITSCRIPT - Relative path to init script
+# CONFIG_EXAMPLES_NSH_ROMFSDEVNO - ROMFS RAM device minor
+# CONFIG_EXAMPLES_NSH_ROMFSSECTSIZE - ROMF sector size
+# CONFIG_EXAMPLES_NSH_FATDEVNO - FAT FS RAM device minor
+# CONFIG_EXAMPLES_NSH_FATSECTSIZE - FAT FS sector size
+# CONFIG_EXAMPLES_NSH_FATNSECTORS - FAT FS number of sectors
+# CONFIG_EXAMPLES_NSH_FATMOUNTPT - FAT FS mountpoint
+#
+CONFIG_EXAMPLES_NSH_FILEIOSIZE=512
+CONFIG_EXAMPLES_NSH_STRERROR=n
+CONFIG_EXAMPLES_NSH_LINELEN=64
+CONFIG_EXAMPLES_NSH_STACKSIZE=2048
+CONFIG_EXAMPLES_NSH_NESTDEPTH=3
+CONFIG_EXAMPLES_NSH_DISABLESCRIPT=n
+CONFIG_EXAMPLES_NSH_DISABLEBG=n
+CONFIG_EXAMPLES_NSH_ROMFSETC=n
+CONFIG_EXAMPLES_NSH_CONSOLE=y
+CONFIG_EXAMPLES_NSH_TELNET=n
+CONFIG_EXAMPLES_NSH_ARCHINIT=n
+CONFIG_EXAMPLES_NSH_IOBUFFER_SIZE=512
+CONFIG_EXAMPLES_NSH_DHCPC=n
+CONFIG_EXAMPLES_NSH_NOMAC=n
+CONFIG_EXAMPLES_NSH_IPADDR=(10<<24|0<<16|0<<8|2)
+CONFIG_EXAMPLES_NSH_DRIPADDR=(10<<24|0<<16|0<<8|1)
+CONFIG_EXAMPLES_NSH_NETMASK=(255<<24|255<<16|255<<8|0)
+CONFIG_EXAMPLES_NSH_ROMFSMOUNTPT="/etc"
+CONFIG_EXAMPLES_NSH_INITSCRIPT="init.d/rcS"
+CONFIG_EXAMPLES_NSH_ROMFSDEVNO=0
+CONFIG_EXAMPLES_NSH_ROMFSSECTSIZE=64
+CONFIG_EXAMPLES_NSH_FATDEVNO=1
+CONFIG_EXAMPLES_NSH_FATSECTSIZE=512
+CONFIG_EXAMPLES_NSH_FATNSECTORS=1024
+CONFIG_EXAMPLES_NSH_FATMOUNTPT=/tmp
+
+#
+# Architecture-specific NSH options
+#
+CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO=0
+CONFIG_EXAMPLES_NSH_MMCSDSLOTNO=0
+CONFIG_EXAMPLES_NSH_MMCSDMINOR=0
+
+#
+# Settings for examples/usbserial
+#
+# CONFIG_EXAMPLES_USBSERIAL_INONLY
+#    Only verify IN (device-to-host) data transfers.  Default: both
+# CONFIG_EXAMPLES_USBSERIAL_OUTONLY
+#    Only verify OUT (host-to-device) data transfers.  Default: both
+# CONFIG_EXAMPLES_USBSERIAL_ONLYSMALL
+#    Send only small, single packet messages.  Default: Send large and small.
+# CONFIG_EXAMPLES_USBSERIAL_ONLYBIG
+#    Send only large, multi-packet messages.  Default: Send large and small.
+#
+CONFIG_EXAMPLES_USBSERIAL_INONLY=n
+CONFIG_EXAMPLES_USBSERIAL_OUTONLY=n
+CONFIG_EXAMPLES_USBSERIAL_ONLYSMALL=n
+CONFIG_EXAMPLES_USBSERIAL_ONLYBIG=n
+
+CONFIG_EXAMPLES_USBSERIAL_TRACEINIT=n
+CONFIG_EXAMPLES_USBSERIAL_TRACECLASS=n
+CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS=n
+CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER=n
+CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=n
+
+#
+# Stack and heap information
+#
+# CONFIG_BOOT_RUNFROMFLASH - Some configurations support XIP
+#   operation from FLASH but must copy initialized .data sections to RAM.
+#   (should also be =n for the LPC17xx which always runs from flash)
+# CONFIG_BOOT_COPYTORAM -  Some configurations boot in FLASH
+#   but copy themselves entirely into RAM for better performance.
+# CONFIG_CUSTOM_STACK - The up_ implementation will handle
+#   all stack operations outside of the nuttx model.
+# CONFIG_STACK_POINTER - The initial stack pointer (arm7tdmi only)
+# CONFIG_IDLETHREAD_STACKSIZE - The size of the initial stack.
+#  This is the thread that (1) performs the inital boot of the system up
+#  to the point where user_start() is spawned, and (2) there after is the
+#  IDLE thread that executes only when there is no other thread ready to
+#  run.
+# CONFIG_USERMAIN_STACKSIZE - The size of the stack to allocate
+#  for the main user thread that begins at the user_start() entry point.
+# CONFIG_PTHREAD_STACK_MIN - Minimum pthread stack size
+# CONFIG_PTHREAD_STACK_DEFAULT - Default pthread stack size
+# CONFIG_HEAP_BASE - The beginning of the heap
+# CONFIG_HEAP_SIZE - The size of the heap
+#
+CONFIG_BOOT_RUNFROMFLASH=n
+CONFIG_BOOT_COPYTORAM=n
+CONFIG_CUSTOM_STACK=n
+CONFIG_STACK_POINTER=
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+CONFIG_HEAP_BASE=
+CONFIG_HEAP_SIZE=
diff --git a/nuttx/configs/nucleus2g/ostest/ld.script b/nuttx/configs/nucleus2g/ostest/ld.script
new file mode 100755
index 000000000..1959ea88d
--- /dev/null
+++ b/nuttx/configs/nucleus2g/ostest/ld.script
@@ -0,0 +1,109 @@
+/****************************************************************************
+ * configs/nucleus2g/ostest/ld.script
+ *
+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The LPC1768 has 512Kb of FLASH beginning at address 0x0000:0000 and
+ * 64Kb of total SRAM: 32Kb of SRAM in the CPU block beginning at address
+ * 0x10000000 and 32Kb of AHB SRAM in two banks of 16Kb beginning at addresses
+ * 0x20070000 and 0x20080000.  Here we assume that .data and .bss will all fit
+ * into the 32Kb CPU SRAM address range.
+ */
+
+MEMORY
+{
+    flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K
+    sram (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)        
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)        
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	_eronly = ABSOLUTE(.);		/* See below                    */
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram AT > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} >sram
+
+	.ARM.exidx : {
+		__exidx_start = ABSOLUTE(.);
+		*(.ARM.exidx*)
+		__exidx_end = ABSOLUTE(.);
+	} >sram
+
+	.bss : {			/* BSS				*/
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram
+					/* Stabs debugging sections.	*/
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/nuttx/configs/nucleus2g/ostest/setenv.sh b/nuttx/configs/nucleus2g/ostest/setenv.sh
new file mode 100755
index 000000000..0c303bfd5
--- /dev/null
+++ b/nuttx/configs/nucleus2g/ostest/setenv.sh
@@ -0,0 +1,47 @@
+#!/bin/bash
+# configs/nucleus2g/ostest/setenv.sh
+#
+#   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$(basename $0)" = "setenv.sh" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}"; fi
+
+WD=`pwd`
+export RIDE_BIN="/cygdrive/c/Program Files/Raisonance/Ride/arm-gcc/bin"
+export BUILDROOT_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+export PATH="${BUILDROOT_BIN}:${RIDE_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/nuttx/configs/nucleus2g/src/Makefile b/nuttx/configs/nucleus2g/src/Makefile
new file mode 100755
index 000000000..ad4a9ac9c
--- /dev/null
+++ b/nuttx/configs/nucleus2g/src/Makefile
@@ -0,0 +1,84 @@
+############################################################################
+# configs/nucleus2g/src/Makefile
+#
+#   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+CFLAGS		+= -I$(TOPDIR)/sched
+
+ASRCS		= 
+AOBJS		= $(ASRCS:.S=$(OBJEXT))
+
+CSRCS		= up_boot.c up_leds.c
+COBJS		= $(CSRCS:.c=$(OBJEXT))
+
+SRCS		= $(ASRCS) $(CSRCS)
+OBJS		= $(AOBJS) $(COBJS)
+
+ARCH_SRCDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+ifeq ($(WINTOOL),y)
+  CFLAGS	+= -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" \
+  		   -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" \
+  		   -I "${shell cygpath -w $(ARCH_SRCDIR)/cortexm3}"
+else
+  CFLAGS	+= -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(ARCH_SRCDIR)/cortexm3
+endif
+
+all: libboard$(LIBEXT)
+
+$(AOBJS): %$(OBJEXT): %.S
+	$(call ASSEMBLE, $<, $@)
+
+$(COBJS) $(LINKOBJS): %$(OBJEXT): %.c
+	$(call COMPILE, $<, $@)
+
+libboard$(LIBEXT): $(OBJS)
+	@( for obj in $(OBJS) ; do \
+		$(call ARCHIVE, $@, $${obj}); \
+	done ; )
+
+.depend: Makefile $(SRCS)
+	@$(MKDEP) $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+	@touch $@
+
+depend: .depend
+
+clean:
+	@rm -f libboard$(LIBEXT) *~ .*.swp
+	$(call CLEAN)
+
+distclean: clean
+	@rm -f Make.dep .depend
+
+-include Make.dep
diff --git a/nuttx/configs/nucleus2g/src/nucleus2g_internal.h b/nuttx/configs/nucleus2g/src/nucleus2g_internal.h
new file mode 100755
index 000000000..ba6cdc044
--- /dev/null
+++ b/nuttx/configs/nucleus2g/src/nucleus2g_internal.h
@@ -0,0 +1,89 @@
+/************************************************************************************

+ * configs/nucleus2g/src/nucleus2g_internal.h

+ * arch/arm/src/board/nucleus2g_internal.n

+ *

+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.

+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in

+ *    the documentation and/or other materials provided with the

+ *    distribution.

+ * 3. Neither the name NuttX nor the names of its contributors may be

+ *    used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS

+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN

+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

+ * POSSIBILITY OF SUCH DAMAGE.

+ *

+ ************************************************************************************/

+

+#ifndef _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H

+#define _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H

+

+/************************************************************************************

+ * Included Files

+ ************************************************************************************/

+

+#include <nuttx/config.h>

+#include <nuttx/compiler.h>

+

+/************************************************************************************

+ * Definitions

+ ************************************************************************************/

+

+/* NUCLEUS-2G GPIO Pin Definitions **************************************************/

+

+/************************************************************************************

+ * Public Types

+ ************************************************************************************/

+

+/************************************************************************************

+ * Public data

+ ************************************************************************************/

+

+#ifndef __ASSEMBLY__

+

+/************************************************************************************

+ * Public Functions

+ ************************************************************************************/

+

+/************************************************************************************

+ * Name: lpc17_spiinitialize

+ *

+ * Description:

+ *   Called to configure SPI chip select GPIO pins for the NUCLEUS-2G board.

+ *

+ ************************************************************************************/

+

+extern void weak_function lpc17_spiinitialize(void);

+

+/************************************************************************************

+ * Name: lpc17_usbinitialize

+ *

+ * Description:

+ *   Called to setup USB-related GPIO pins for the NUCLEUS-2G board.

+ *

+ ************************************************************************************/

+

+extern void weak_function lpc17_usbinitialize(void);

+

+#endif /* __ASSEMBLY__ */

+#endif /* _CONFIGS_NUCLEUS2G_SRC_NUCLEUS2G_INTERNAL_H */

+

diff --git a/nuttx/configs/nucleus2g/src/up_boot.c b/nuttx/configs/nucleus2g/src/up_boot.c
new file mode 100755
index 000000000..2bd971c4c
--- /dev/null
+++ b/nuttx/configs/nucleus2g/src/up_boot.c
@@ -0,0 +1,103 @@
+/************************************************************************************

+ * configs/nucleus2g/src/up_boot.c

+ * arch/arm/src/board/up_boot.c

+ *

+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.

+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in

+ *    the documentation and/or other materials provided with the

+ *    distribution.

+ * 3. Neither the name NuttX nor the names of its contributors may be

+ *    used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS

+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN

+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

+ * POSSIBILITY OF SUCH DAMAGE.

+ *

+ ************************************************************************************/

+

+/************************************************************************************

+ * Included Files

+ ************************************************************************************/

+

+#include <nuttx/config.h>

+

+#include <debug.h>

+

+#include <arch/board/board.h>

+

+#include "up_arch.h"

+#include "up_internal.h"

+#include "nucleus2g_internal.h"

+

+/************************************************************************************

+ * Definitions

+ ************************************************************************************/

+

+/************************************************************************************

+ * Private Functions

+ ************************************************************************************/

+

+/************************************************************************************

+ * Public Functions

+ ************************************************************************************/

+

+/************************************************************************************

+ * Name: lpc17_boardinitialize

+ *

+ * Description:

+ *   All LPC17xx architectures must provide the following entry point.  This entry point

+ *   is called early in the intitialization -- after all memory has been configured

+ *   and mapped but before any devices have been initialized.

+ *

+ ************************************************************************************/

+

+void lpc17_boardinitialize(void)

+{

+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function

+   * lpc17_spiinitialize() has been brought into the link.

+   */

+

+#if defined(CONFIG_LPC17_SPI)

+  if (lpc17_spiinitialize)

+    {

+      lpc17_spiinitialize();

+    }

+#endif

+

+   /* Initialize USB if 1) USBDEV is selected, 2) the USB controller is not

+    * disabled, and 3) the weak function lpc17_usbinitialize() has been brought

+    * into the build.

+    */

+

+#if defined(CONFIG_USBDEV) && defined(CONFIG_LPC17_USBDEV)

+  if (lpc17_usbinitialize)

+    {

+      lpc17_usbinitialize();

+    }

+#endif

+

+  /* Configure on-board LEDs if LED support has been selected. */

+

+#ifdef CONFIG_ARCH_LEDS

+  up_ledinit();

+#endif

+}

diff --git a/nuttx/configs/nucleus2g/src/up_leds.c b/nuttx/configs/nucleus2g/src/up_leds.c
new file mode 100755
index 000000000..695302fb5
--- /dev/null
+++ b/nuttx/configs/nucleus2g/src/up_leds.c
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * configs/nucleus2g/src/up_leds.c
+ * arch/arm/src/board/up_leds.c
+ *
+ *   Copyright (C) 2010 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "up_arch.h"
+#include "up_internal.h"
+#include "lpc17_internal.h"
+#include "nucleus2g_internal.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Enables debug output from this file (needs CONFIG_DEBUG with
+ * CONFIG_DEBUG_VERBOSE too)
+ */
+
+#undef LED_DEBUG  /* Define to enable debug */
+
+#ifdef LED_DEBUG
+#  define leddbg  lldbg
+#  define ledvdbg llvdbg
+#else
+#  define leddbg(x...)
+#  define ledvdbg(x...)
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_ledinit
+ ****************************************************************************/
+
+void up_ledinit(void)
+{
+}
+
+/****************************************************************************
+ * Name: up_ledon
+ ****************************************************************************/
+
+void up_ledon(int led)
+{
+}
+
+/****************************************************************************
+ * Name: up_ledoff
+ ****************************************************************************/
+
+void up_ledoff(int led)
+{
+}
+
+#endif /* CONFIG_ARCH_LEDS */