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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-03-02 00:11:43 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-03-02 00:11:43 +0000 |
commit | 3c17616fb76eca92cc0daaa56b8769e381c69330 (patch) | |
tree | 5372e0943d4ab7fab88c7783e2e2ae27027bfc64 | |
parent | 94a1310d987561bbda5050864b33c1498b6a0caf (diff) | |
download | px4-nuttx-3c17616fb76eca92cc0daaa56b8769e381c69330.tar.gz px4-nuttx-3c17616fb76eca92cc0daaa56b8769e381c69330.tar.bz2 px4-nuttx-3c17616fb76eca92cc0daaa56b8769e381c69330.zip |
Handle LM4F GPIO -- fewer ports
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5695 42af7a65-404d-4744-a932-0658087f49c3
-rw-r--r-- | nuttx/ChangeLog | 5 | ||||
-rw-r--r-- | nuttx/arch/arm/include/lm/irq.h | 22 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm/lm_dumpgpio.c | 76 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm/lm_gpio.c | 50 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm/lm_gpioirq.c | 38 | ||||
-rw-r--r-- | nuttx/configs/Kconfig | 2 |
6 files changed, 138 insertions, 55 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index d518d863d..5cb02ad69 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -4228,4 +4228,9 @@ * configs/lm4f120-launchpad: In initial configuration for testing the LM4F120 LaunchPad port. This is to support testing only and is not yet a functional board port (as of 2013-03-01). + * arch/arm/include/lm/lm4f_irq.h and arch/arm/src/lm/chip/lm4f_vector.h: + Add interrupt vector/IRQ number definitions for the LM4F120. + * arch/arm/src/stm32f20xxx_dma.c and stm32f40xxx_dma.c: Fix a typo + in assigned base register addresses for each DMA channel. From + Yan T. diff --git a/nuttx/arch/arm/include/lm/irq.h b/nuttx/arch/arm/include/lm/irq.h index 4f72e9824..51e362da5 100644 --- a/nuttx/arch/arm/include/lm/irq.h +++ b/nuttx/arch/arm/include/lm/irq.h @@ -42,10 +42,32 @@ #include <nuttx/config.h> #include <nuttx/irq.h> +#include <arch/lm/chip.h> /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ + /* Mark GPIO interrupts as disabled for non-existent GPIO ports. */ + +#if LM_NPORTS < 1 && !defined(CONFIG_LM_DISABLE_GPIOA_IRQS) +# define CONFIG_LM_DISABLE_GPIOA_IRQS +#elif LM_NPORTS < 2 && !defined(CONFIG_LM_DISABLE_GPIOB_IRQS) +# define CONFIG_LM_DISABLE_GPIOB_IRQS +#elif LM_NPORTS < 3 && !defined(CONFIG_LM_DISABLE_GPIOC_IRQS) +# define CONFIG_LM_DISABLE_GPIOC_IRQS +#elif LM_NPORTS < 4 && !defined(CONFIG_LM_DISABLE_GPIOD_IRQS) +# define CONFIG_LM_DISABLE_GPIOD_IRQS +#elif LM_NPORTS < 5 && !defined(CONFIG_LM_DISABLE_GPIOE_IRQS) +# define CONFIG_LM_DISABLE_GPIOE_IRQS +#elif LM_NPORTS < 6 && !defined(CONFIG_LM_DISABLE_GPIOF_IRQS) +# define CONFIG_LM_DISABLE_GPIOF_IRQS +#elif LM_NPORTS < 7 && !defined(CONFIG_LM_DISABLE_GPIOG_IRQS) +# define CONFIG_LM_DISABLE_GPIOG_IRQS +#elif LM_NPORTS < 8 && !defined(CONFIG_LM_DISABLE_GPIOH_IRQS) +# define CONFIG_LM_DISABLE_GPIOH_IRQS +#elif LM_NPORTS < 9 && !defined(CONFIG_LM_DISABLE_GPIOJ_IRQS) +# define CONFIG_LM_DISABLE_GPIOJ_IRQS +#endif /* Processor Exceptions (vectors 0-15) */ diff --git a/nuttx/arch/arm/src/lm/lm_dumpgpio.c b/nuttx/arch/arm/src/lm/lm_dumpgpio.c index f71e9c9a0..d1202efa4 100644 --- a/nuttx/arch/arm/src/lm/lm_dumpgpio.c +++ b/nuttx/arch/arm/src/lm/lm_dumpgpio.c @@ -60,23 +60,67 @@ /* NOTE: this is duplicated in lm_gpio.c */ -#ifdef LM_GPIOH_BASE -static const uint32_t g_gpiobase[8] = +static const uintptr_t g_gpiobase[LM_NPORTS] = { - LM_GPIOA_BASE, LM_GPIOB_BASE, LM_GPIOC_BASE, LM_GPIOD_BASE, - LM_GPIOE_BASE, LM_GPIOF_BASE, LM_GPIOG_BASE, LM_GPIOH_BASE, +#if LM_NPORTS > 0 + LM_GPIOA_BASE +#endif +#if LM_NPORTS > 1 + , LM_GPIOB_BASE +#endif +#if LM_NPORTS > 2 + , LM_GPIOC_BASE +#endif +#if LM_NPORTS > 3 + , LM_GPIOD_BASE +#endif +#if LM_NPORTS > 4 + , LM_GPIOE_BASE +#endif +#if LM_NPORTS > 5 + , LM_GPIOF_BASE +#endif +#if LM_NPORTS > 6 + , LM_GPIOG_BASE +#endif +#if LM_NPORTS > 7 + , LM_GPIOH_BASE +#endif +#if LM_NPORTS > 8 + , LM_GPIOJ_BASE +#endif }; -static const char g_portchar[8] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' }; -#else -static const uint32_t g_gpiobase[8] = +static const char g_portchar[LM_NPORTS] = { - LM_GPIOA_BASE, LM_GPIOB_BASE, LM_GPIOC_BASE, LM_GPIOD_BASE, - LM_GPIOE_BASE, LM_GPIOF_BASE, LM_GPIOG_BASE, 0, -}; - -static const char g_portchar[8] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', '?' }; +#if LM_NPORTS > 0 + 'A' +#endif +#if LM_NPORTS > 1 + , 'B' +#endif +#if LM_NPORTS > 2 + , 'C' +#endif +#if LM_NPORTS > 3 + , 'D' +#endif +#if LM_NPORTS > 4 + , 'E' #endif +#if LM_NPORTS > 5 + , 'F' +#endif +#if LM_NPORTS > 6 + , 'G' +#endif +#if LM_NPORTS > 7 + , 'H' +#endif +#if LM_NPORTS > 8 + , 'J' +#endif +}; /**************************************************************************** * Private Functions @@ -91,9 +135,9 @@ static const char g_portchar[8] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', '?' }; * ****************************************************************************/ -static inline uint32_t lm_gpiobaseaddress(int port) +static inline uintptr_t lm_gpiobaseaddress(int port) { - return g_gpiobase[port & 7]; + return port < LM_NPORTS ? g_gpiobase[port] : 0; } /**************************************************************************** @@ -107,7 +151,7 @@ static inline uint32_t lm_gpiobaseaddress(int port) static inline uint8_t lm_gpioport(int port) { - return g_portchar[port & 7]; + return port < LM_NPORTS ? g_portchar[port] : '?'; } /**************************************************************************** @@ -126,7 +170,7 @@ int lm_dumpgpio(uint32_t pinset, const char *msg) { irqstate_t flags; unsigned int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; - uint32_t base; + uintptr_t base; uint32_t rcgc2; bool enabled; diff --git a/nuttx/arch/arm/src/lm/lm_gpio.c b/nuttx/arch/arm/src/lm/lm_gpio.c index 5b49f5a6c..43dc42cb4 100644 --- a/nuttx/arch/arm/src/lm/lm_gpio.c +++ b/nuttx/arch/arm/src/lm/lm_gpio.c @@ -140,23 +140,36 @@ static const struct gpio_func_s g_funcbits[] = {GPIO_INTERRUPT_SETBITS, GPIO_INTERRUPT_CLRBITS}, /* GPIO_FUNC_INTERRUPT */ }; -static const uint32_t g_gpiobase[LM_NPORTS] = -{ - /* All support Stellaris parts have at least 7 ports, GPIOA-G */ - - LM_GPIOA_BASE, LM_GPIOB_BASE, LM_GPIOC_BASE, LM_GPIOD_BASE, - LM_GPIOE_BASE, LM_GPIOF_BASE, LM_GPIOG_BASE, - - /* GPIOH exists on the LM3S6918 and th LM3S6B96, but not on the LM3S6965 or LM3S8962*/ +/* NOTE: this is duplicated in lm_dumpgpio.c */ +static const uintptr_t g_gpiobase[LM_NPORTS] = +{ +#if LM_NPORTS > 0 + LM_GPIOA_BASE +#endif +#if LM_NPORTS > 1 + , LM_GPIOB_BASE +#endif +#if LM_NPORTS > 2 + , LM_GPIOC_BASE +#endif +#if LM_NPORTS > 3 + , LM_GPIOD_BASE +#endif +#if LM_NPORTS > 4 + , LM_GPIOE_BASE +#endif +#if LM_NPORTS > 5 + , LM_GPIOF_BASE +#endif +#if LM_NPORTS > 6 + , LM_GPIOG_BASE +#endif #if LM_NPORTS > 7 - LM_GPIOH_BASE, + , LM_GPIOH_BASE #endif - - /* GPIOJ exists on the LM3S6B96, but not on the LM3S6918 or LM3S6965 or LM3S8962*/ - #if LM_NPORTS > 8 - LM_GPIOJ_BASE, + , LM_GPIOJ_BASE #endif }; @@ -177,13 +190,14 @@ static const uint32_t g_gpiobase[LM_NPORTS] = * ****************************************************************************/ -static uint32_t lm_gpiobaseaddress(unsigned int port) +static uintptr_t lm_gpiobaseaddress(unsigned int port) { - uint32_t gpiobase = 0; + uintptr_t gpiobase = 0; if (port < LM_NPORTS) { gpiobase = g_gpiobase[port]; } + return gpiobase; } @@ -707,8 +721,8 @@ int lm_configgpio(uint32_t cfgset) unsigned int func; unsigned int port; unsigned int pinno; + uintptr_t base; uint32_t pin; - uint32_t base; uint32_t regval; /* Decode the basics */ @@ -787,7 +801,7 @@ void lm_gpiowrite(uint32_t pinset, bool value) { unsigned int port; unsigned int pinno; - uint32_t base; + uintptr_t base; /* Decode the basics */ @@ -825,7 +839,7 @@ bool lm_gpioread(uint32_t pinset, bool value) { unsigned int port; unsigned int pinno; - uint32_t base; + uintptr_t base; /* Decode the basics */ diff --git a/nuttx/arch/arm/src/lm/lm_gpioirq.c b/nuttx/arch/arm/src/lm/lm_gpioirq.c index e8423f4c0..8c0da4855 100644 --- a/nuttx/arch/arm/src/lm/lm_gpioirq.c +++ b/nuttx/arch/arm/src/lm/lm_gpioirq.c @@ -70,45 +70,40 @@ static FAR xcpt_t g_gpioirqvector[NR_GPIO_IRQS]; * must carefully match the IRQ numbers assigned in arch/arm/include/lm3s/irq.h */ -static const uint32_t g_gpiobase[] = +static const uintptr_t g_gpiobase[] = { #ifndef CONFIG_LM_DISABLE_GPIOA_IRQS - LM_GPIOA_BASE, + LM_GPIOA_BASE +#else + 0 #endif #ifndef CONFIG_LM_DISABLE_GPIOB_IRQS - LM_GPIOB_BASE, + , LM_GPIOB_BASE #endif #ifndef CONFIG_LM_DISABLE_GPIOC_IRQS - LM_GPIOC_BASE, + , LM_GPIOC_BASE #endif #ifndef CONFIG_LM_DISABLE_GPIOD_IRQS - LM_GPIOD_BASE, + , LM_GPIOD_BASE #endif #ifndef CONFIG_LM_DISABLE_GPIOE_IRQS - LM_GPIOE_BASE, + , LM_GPIOE_BASE #endif #ifndef CONFIG_LM_DISABLE_GPIOF_IRQS - LM_GPIOF_BASE, + , LM_GPIOF_BASE #endif #ifndef CONFIG_LM_DISABLE_GPIOG_IRQS - LM_GPIOG_BASE, + , LM_GPIOG_BASE #endif - - /* NOTE: Not all Stellaris architectures support GPIOs above GPIOG. If the - * chip does not support these higher ports, then they must be disabled in - * the configuration. Otherwise, the following will likely cause compilation - * errors! - */ - #ifndef CONFIG_LM_DISABLE_GPIOH_IRQS - LM_GPIOH_BASE, + , LM_GPIOH_BASE #endif #ifndef CONFIG_LM_DISABLE_GPIOJ_IRQS - LM_GPIOJ_BASE, + , LM_GPIOJ_BASE #endif }; -#define GPIO_NADDRS (sizeof(g_gpiobase)/sizeof(uint32_t)) +#define GPIO_NADDRS (sizeof(g_gpiobase)/sizeof(uintptr_t)) /**************************************************************************** * Public Data @@ -131,13 +126,14 @@ static const uint32_t g_gpiobase[] = * ****************************************************************************/ -static uint32_t lm_gpiobaseaddress(unsigned int gpioirq) +static uintptr_t lm_gpiobaseaddress(unsigned int gpioirq) { unsigned int ndx = gpioirq >> 3; if (ndx < GPIO_NADDRS) { return g_gpiobase[ndx]; } + return 0; } @@ -366,7 +362,7 @@ void gpio_irqenable(int irq) { irqstate_t flags; int gpioirq = irq - NR_IRQS; - uint32_t base; + uintptr_t base; uint32_t regval; int pin; @@ -405,7 +401,7 @@ void gpio_irqdisable(int irq) { irqstate_t flags; int gpioirq = irq - NR_IRQS; - uint32_t base; + uintptr_t base; uint32_t regval; int pin; diff --git a/nuttx/configs/Kconfig b/nuttx/configs/Kconfig index 0f0685177..9883ca3de 100644 --- a/nuttx/configs/Kconfig +++ b/nuttx/configs/Kconfig @@ -212,6 +212,7 @@ config ARCH_BOARD_LM4F120_LAUNCHPAD config ARCH_BOARD_LPCXPRESSO bool "NXP LPCExpresso LPC1768" depends on ARCH_CHIP_LPC1768 + select ARCH_HAVE_LEDS ---help--- Embedded Artists base board with NXP LPCExpresso LPC1768. This board is based on the NXP LPC1768. The Code Red toolchain is used by default. @@ -665,6 +666,7 @@ config ARCH_BOARD_ZP214XPA config ARCH_BOARD_ZKITARM bool "Zilogic ZKit-ARM-1769 Development Kit" depends on ARCH_CHIP_LPC1768 + select ARCH_HAVE_LEDS ---help--- Zilogic System's ARM development Kit, ZKIT-ARM-1769. This board is based on the NXP LPC1769. The Nuttx Buildroot toolchain is used by default. |