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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-30 13:24:45 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2013-01-30 13:24:45 +0000 |
commit | 501c6962776d0468de9f454231e0b2cb47e44c2e (patch) | |
tree | 96bec449da48cf5d8cc98cb94a6f1ba06d1d3f86 /nuttx/arch/arm/src/lpc17xx/chip | |
parent | 7b78d906d966d2c2b266bce9c1c0c8fef19c3103 (diff) | |
download | px4-nuttx-501c6962776d0468de9f454231e0b2cb47e44c2e.tar.gz px4-nuttx-501c6962776d0468de9f454231e0b2cb47e44c2e.tar.bz2 px4-nuttx-501c6962776d0468de9f454231e0b2cb47e44c2e.zip |
LPC1788 updated from Rommel Marcelo
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5583 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/chip')
-rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h | 217 |
1 files changed, 208 insertions, 9 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h index b8c9ee480..a3c247caf 100755 --- a/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h +++ b/nuttx/arch/arm/src/lpc17xx/chip/lpc178x_iocon.h @@ -52,13 +52,7 @@ /* Register offsets *****************************************************************/ -#define LPC17_IOCON_P0_OFFSET (LPC17_IOCON_BASE+0x0000) -#define LPC17_IOCON_P1_OFFSET (LPC17_IOCON_BASE+0x0080) -#define LPC17_IOCON_P2_OFFSET (LPC17_IOCON_BASE+0x0100) -#define LPC17_IOCON_P3_OFFSET (LPC17_IOCON_BASE+0x0180) -#define LPC17_IOCON_P4_OFFSET (LPC17_IOCON_BASE+0x0200) -#define LPC17_IOCON_P5_OFFSET (LPC17_IOCON_BASE+0x0280) - +#define LPC17_IOCON_PP_OFFSET(p) ((p) << 2) #define LPC17_IOCON_PP0_OFFSET (0x0000) /* IOCON Port(n) register 0 */ #define LPC17_IOCON_PP1_OFFSET (0x0004) /* IOCON Port(n) register 1 */ #define LPC17_IOCON_PP2_OFFSET (0x0008) /* IOCON Port(n) register 2 */ @@ -94,10 +88,215 @@ /* Register addresses ***************************************************************/ -//~ #define LPC17_IOCON_PP1(portoffset) (portoffset+LPC17_IOCON_P0_OFFSET) +#define LPC17_IOCON_P_BASE(b) (LPC17_IOCON_BASE + ((b) << 7)) +#define LPC17_IOCON_P0_BASE (LPC17_IOCON_BASE + 0x0000) +#define LPC17_IOCON_P1_BASE (LPC17_IOCON_BASE + 0x0080) +#define LPC17_IOCON_P2_BASE (LPC17_IOCON_BASE + 0x0100) +#define LPC17_IOCON_P3_BASE (LPC17_IOCON_BASE + 0x0180) +#define LPC17_IOCON_P4_BASE (LPC17_IOCON_BASE + 0x0200) +#define LPC17_IOCON_P4_BASE (LPC17_IOCON_BASE + 0x0280) + +#define LPC17_IOCON_P(b,p) (LPC17_IOCON_P_BASE(b) + LPC17_IOCON_PP_OFFSET(p)) + +#define LPC17_IOCON_P0_0 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP0_OFFSET) +#define LPC17_IOCON_P0_1 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP1_OFFSET) +#define LPC17_IOCON_P0_2 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP2_OFFSET) +#define LPC17_IOCON_P0_3 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP3_OFFSET) +#define LPC17_IOCON_P0_4 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP4_OFFSET) +#define LPC17_IOCON_P0_5 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP5_OFFSET) +#define LPC17_IOCON_P0_6 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP6_OFFSET) +#define LPC17_IOCON_P0_7 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP7_OFFSET) +#define LPC17_IOCON_P0_8 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP8_OFFSET) +#define LPC17_IOCON_P0_9 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP9_OFFSET) +#define LPC17_IOCON_P0_10 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP10_OFFSET) +#define LPC17_IOCON_P0_11 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP11_OFFSET) +#define LPC17_IOCON_P0_12 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP12_OFFSET) +#define LPC17_IOCON_P0_13 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP13_OFFSET) +#define LPC17_IOCON_P0_14 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP14_OFFSET) +#define LPC17_IOCON_P0_15 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP15_OFFSET) +#define LPC17_IOCON_P0_16 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP16_OFFSET) +#define LPC17_IOCON_P0_17 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP17_OFFSET) +#define LPC17_IOCON_P0_18 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP18_OFFSET) +#define LPC17_IOCON_P0_19 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP19_OFFSET) +#define LPC17_IOCON_P0_20 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP20_OFFSET) +#define LPC17_IOCON_P0_21 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP21_OFFSET) +#define LPC17_IOCON_P0_22 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP22_OFFSET) +#define LPC17_IOCON_P0_23 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP23_OFFSET) +#define LPC17_IOCON_P0_24 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP24_OFFSET) +#define LPC17_IOCON_P0_25 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP25_OFFSET) +#define LPC17_IOCON_P0_26 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP26_OFFSET) +#define LPC17_IOCON_P0_27 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP27_OFFSET) +#define LPC17_IOCON_P0_28 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP28_OFFSET) +#define LPC17_IOCON_P0_29 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP29_OFFSET) +#define LPC17_IOCON_P0_30 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP30_OFFSET) +#define LPC17_IOCON_P0_31 (LPC17_IOCON_P0_BASE + LPC17_IOCON_PP31_OFFSET) + +#define LPC17_IOCON_P1_0 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP0_OFFSET) +#define LPC17_IOCON_P1_1 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP1_OFFSET) +#define LPC17_IOCON_P1_2 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP2_OFFSET) +#define LPC17_IOCON_P1_3 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP3_OFFSET) +#define LPC17_IOCON_P1_4 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP4_OFFSET) +#define LPC17_IOCON_P1_5 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP5_OFFSET) +#define LPC17_IOCON_P1_6 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP6_OFFSET) +#define LPC17_IOCON_P1_7 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP7_OFFSET) +#define LPC17_IOCON_P1_8 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP8_OFFSET) +#define LPC17_IOCON_P1_9 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP9_OFFSET) +#define LPC17_IOCON_P1_10 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP10_OFFSET) +#define LPC17_IOCON_P1_11 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP11_OFFSET) +#define LPC17_IOCON_P1_12 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP12_OFFSET) +#define LPC17_IOCON_P1_13 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP13_OFFSET) +#define LPC17_IOCON_P1_14 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP14_OFFSET) +#define LPC17_IOCON_P1_15 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP15_OFFSET) +#define LPC17_IOCON_P1_16 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP16_OFFSET) +#define LPC17_IOCON_P1_17 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP17_OFFSET) +#define LPC17_IOCON_P1_18 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP18_OFFSET) +#define LPC17_IOCON_P1_19 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP19_OFFSET) +#define LPC17_IOCON_P1_20 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP20_OFFSET) +#define LPC17_IOCON_P1_21 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP21_OFFSET) +#define LPC17_IOCON_P1_22 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP22_OFFSET) +#define LPC17_IOCON_P1_23 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP23_OFFSET) +#define LPC17_IOCON_P1_24 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP24_OFFSET) +#define LPC17_IOCON_P1_25 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP25_OFFSET) +#define LPC17_IOCON_P1_26 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP26_OFFSET) +#define LPC17_IOCON_P1_27 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP27_OFFSET) +#define LPC17_IOCON_P1_28 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP28_OFFSET) +#define LPC17_IOCON_P1_29 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP29_OFFSET) +#define LPC17_IOCON_P1_30 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP30_OFFSET) +#define LPC17_IOCON_P1_31 (LPC17_IOCON_P1_BASE + LPC17_IOCON_PP31_OFFSET) + +#define LPC17_IOCON_P2_0 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP0_OFFSET) +#define LPC17_IOCON_P2_1 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP1_OFFSET) +#define LPC17_IOCON_P2_2 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP2_OFFSET) +#define LPC17_IOCON_P2_3 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP3_OFFSET) +#define LPC17_IOCON_P2_4 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP4_OFFSET) +#define LPC17_IOCON_P2_5 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP5_OFFSET) +#define LPC17_IOCON_P2_6 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP6_OFFSET) +#define LPC17_IOCON_P2_7 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP7_OFFSET) +#define LPC17_IOCON_P2_8 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP8_OFFSET) +#define LPC17_IOCON_P2_9 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP9_OFFSET) +#define LPC17_IOCON_P2_10 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP10_OFFSET) +#define LPC17_IOCON_P2_11 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP11_OFFSET) +#define LPC17_IOCON_P2_12 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP12_OFFSET) +#define LPC17_IOCON_P2_13 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP13_OFFSET) +#define LPC17_IOCON_P2_14 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP14_OFFSET) +#define LPC17_IOCON_P2_15 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP15_OFFSET) +#define LPC17_IOCON_P2_16 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP16_OFFSET) +#define LPC17_IOCON_P2_17 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP17_OFFSET) +#define LPC17_IOCON_P2_18 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP18_OFFSET) +#define LPC17_IOCON_P2_19 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP19_OFFSET) +#define LPC17_IOCON_P2_20 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP20_OFFSET) +#define LPC17_IOCON_P2_21 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP21_OFFSET) +#define LPC17_IOCON_P2_22 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP22_OFFSET) +#define LPC17_IOCON_P2_23 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP23_OFFSET) +#define LPC17_IOCON_P2_24 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP24_OFFSET) +#define LPC17_IOCON_P2_25 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP25_OFFSET) +#define LPC17_IOCON_P2_26 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP26_OFFSET) +#define LPC17_IOCON_P2_27 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP27_OFFSET) +#define LPC17_IOCON_P2_28 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP28_OFFSET) +#define LPC17_IOCON_P2_29 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP29_OFFSET) +#define LPC17_IOCON_P2_30 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP30_OFFSET) +#define LPC17_IOCON_P2_31 (LPC17_IOCON_P2_BASE + LPC17_IOCON_PP31_OFFSET) + +#define LPC17_IOCON_P3_0 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP0_OFFSET) +#define LPC17_IOCON_P3_1 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP1_OFFSET) +#define LPC17_IOCON_P3_2 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP2_OFFSET) +#define LPC17_IOCON_P3_3 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP3_OFFSET) +#define LPC17_IOCON_P3_4 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP4_OFFSET) +#define LPC17_IOCON_P3_5 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP5_OFFSET) +#define LPC17_IOCON_P3_6 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP6_OFFSET) +#define LPC17_IOCON_P3_7 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP7_OFFSET) +#define LPC17_IOCON_P3_8 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP8_OFFSET) +#define LPC17_IOCON_P3_9 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP9_OFFSET) +#define LPC17_IOCON_P3_10 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP10_OFFSET) +#define LPC17_IOCON_P3_11 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP11_OFFSET) +#define LPC17_IOCON_P3_12 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP12_OFFSET) +#define LPC17_IOCON_P3_13 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP13_OFFSET) +#define LPC17_IOCON_P3_14 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP14_OFFSET) +#define LPC17_IOCON_P3_15 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP15_OFFSET) +#define LPC17_IOCON_P3_16 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP16_OFFSET) +#define LPC17_IOCON_P3_17 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP17_OFFSET) +#define LPC17_IOCON_P3_18 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP18_OFFSET) +#define LPC17_IOCON_P3_19 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP19_OFFSET) +#define LPC17_IOCON_P3_20 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP20_OFFSET) +#define LPC17_IOCON_P3_21 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP21_OFFSET) +#define LPC17_IOCON_P3_22 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP22_OFFSET) +#define LPC17_IOCON_P3_23 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP23_OFFSET) +#define LPC17_IOCON_P3_24 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP24_OFFSET) +#define LPC17_IOCON_P3_25 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP25_OFFSET) +#define LPC17_IOCON_P3_26 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP26_OFFSET) +#define LPC17_IOCON_P3_27 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP27_OFFSET) +#define LPC17_IOCON_P3_28 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP28_OFFSET) +#define LPC17_IOCON_P3_29 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP29_OFFSET) +#define LPC17_IOCON_P3_30 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP30_OFFSET) +#define LPC17_IOCON_P3_31 (LPC17_IOCON_P3_BASE + LPC17_IOCON_PP31_OFFSET) + +#define LPC17_IOCON_P4_0 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP0_OFFSET) +#define LPC17_IOCON_P4_1 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP1_OFFSET) +#define LPC17_IOCON_P4_2 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP2_OFFSET) +#define LPC17_IOCON_P4_3 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP3_OFFSET) +#define LPC17_IOCON_P4_4 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP4_OFFSET) +#define LPC17_IOCON_P4_5 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP5_OFFSET) +#define LPC17_IOCON_P4_6 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP6_OFFSET) +#define LPC17_IOCON_P4_7 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP7_OFFSET) +#define LPC17_IOCON_P4_8 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP8_OFFSET) +#define LPC17_IOCON_P4_9 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP9_OFFSET) +#define LPC17_IOCON_P4_10 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP10_OFFSET) +#define LPC17_IOCON_P4_11 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP11_OFFSET) +#define LPC17_IOCON_P4_12 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP12_OFFSET) +#define LPC17_IOCON_P4_13 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP13_OFFSET) +#define LPC17_IOCON_P4_14 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP14_OFFSET) +#define LPC17_IOCON_P4_15 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP15_OFFSET) +#define LPC17_IOCON_P4_16 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP16_OFFSET) +#define LPC17_IOCON_P4_17 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP17_OFFSET) +#define LPC17_IOCON_P4_18 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP18_OFFSET) +#define LPC17_IOCON_P4_19 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP19_OFFSET) +#define LPC17_IOCON_P4_20 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP20_OFFSET) +#define LPC17_IOCON_P4_21 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP21_OFFSET) +#define LPC17_IOCON_P4_22 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP22_OFFSET) +#define LPC17_IOCON_P4_23 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP23_OFFSET) +#define LPC17_IOCON_P4_24 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP24_OFFSET) +#define LPC17_IOCON_P4_25 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP25_OFFSET) +#define LPC17_IOCON_P4_26 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP26_OFFSET) +#define LPC17_IOCON_P4_27 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP27_OFFSET) +#define LPC17_IOCON_P4_28 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP28_OFFSET) +#define LPC17_IOCON_P4_29 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP29_OFFSET) +#define LPC17_IOCON_P4_30 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP30_OFFSET) +#define LPC17_IOCON_P4_31 (LPC17_IOCON_P4_BASE + LPC17_IOCON_PP31_OFFSET) + +#define LPC17_IOCON_P5_0 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP0_OFFSET) +#define LPC17_IOCON_P5_1 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP1_OFFSET) +#define LPC17_IOCON_P5_2 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP2_OFFSET) +#define LPC17_IOCON_P5_3 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP3_OFFSET) +#define LPC17_IOCON_P5_4 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP4_OFFSET) +#define LPC17_IOCON_P5_5 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP5_OFFSET) +#define LPC17_IOCON_P5_6 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP6_OFFSET) +#define LPC17_IOCON_P5_7 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP7_OFFSET) +#define LPC17_IOCON_P5_8 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP8_OFFSET) +#define LPC17_IOCON_P5_9 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP9_OFFSET) +#define LPC17_IOCON_P5_10 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP10_OFFSET) +#define LPC17_IOCON_P5_11 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP11_OFFSET) +#define LPC17_IOCON_P5_12 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP12_OFFSET) +#define LPC17_IOCON_P5_13 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP13_OFFSET) +#define LPC17_IOCON_P5_14 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP14_OFFSET) +#define LPC17_IOCON_P5_15 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP15_OFFSET) +#define LPC17_IOCON_P5_16 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP16_OFFSET) +#define LPC17_IOCON_P5_17 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP17_OFFSET) +#define LPC17_IOCON_P5_18 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP18_OFFSET) +#define LPC17_IOCON_P5_19 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP19_OFFSET) +#define LPC17_IOCON_P5_20 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP20_OFFSET) +#define LPC17_IOCON_P5_21 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP21_OFFSET) +#define LPC17_IOCON_P5_22 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP22_OFFSET) +#define LPC17_IOCON_P5_23 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP23_OFFSET) +#define LPC17_IOCON_P5_24 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP24_OFFSET) +#define LPC17_IOCON_P5_25 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP25_OFFSET) +#define LPC17_IOCON_P5_26 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP26_OFFSET) +#define LPC17_IOCON_P5_27 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP27_OFFSET) +#define LPC17_IOCON_P5_28 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP28_OFFSET) +#define LPC17_IOCON_P5_29 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP29_OFFSET) +#define LPC17_IOCON_P5_30 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP30_OFFSET) +#define LPC17_IOCON_P5_31 (LPC17_IOCON_P5_BASE + LPC17_IOCON_PP31_OFFSET) /* Register bit definitions *********************************************************/ -/* Pin Function Select register 0 (PINSEL0: 0x4002c000) */ /* IOCON pin function select */ #define IOCON_FUNC_GPIO (0) |