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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-06-11 01:55:43 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-06-11 01:55:43 +0000 |
| commit | f697e5bf7e8cb0c9795fcaa469d9f26e2b558f00 (patch) | |
| tree | 981e8123832a6b1911989a59f9fa356e6ba85d8b /nuttx/arch/arm/src/lpc17xx/lpc17_allocateheap.c | |
| parent | cc84cc1568935def0f81a23c3df168e5d6588599 (diff) | |
| download | px4-nuttx-f697e5bf7e8cb0c9795fcaa469d9f26e2b558f00.tar.gz px4-nuttx-f697e5bf7e8cb0c9795fcaa469d9f26e2b558f00.tar.bz2 px4-nuttx-f697e5bf7e8cb0c9795fcaa469d9f26e2b558f00.zip | |
Finish serial drivers
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2738 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/lpc17xx/lpc17_allocateheap.c')
| -rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_allocateheap.c | 30 |
1 files changed, 24 insertions, 6 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_allocateheap.c b/nuttx/arch/arm/src/lpc17xx/lpc17_allocateheap.c index 3fee53018..bcb701407 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_allocateheap.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_allocateheap.c @@ -49,15 +49,29 @@ #include "up_arch.h" #include "up_internal.h" +#include "lpc17_memorymap.h" + /**************************************************************************** * Private Definitions ****************************************************************************/ -#if CONFIG_DRAM_END > (LPC17_SRAM_BASE+LPC17_SRAM_SIZE) -# error "CONFIG_DRAM_END is beyond the end of CPU SRAM" +/* Configuration ************************************************************/ + +#if CONFIG_DRAM_START != LPC17_SRAM_BASE +# warning "CONFIG_DRAM_START is not at LPC17_SRAM_BASE" +# undef CONFIG_DRAM_START +# undef CONFIG_DRAM_END +# define CONFIG_DRAM_START LPC17_SRAM_BASE +# define CONFIG_DRAM_END (LPC17_SRAM_BASE+LPC17_CPUSRAM_SIZE) +#endif + +#if CONFIG_DRAM_SIZE > LPC17_CPUSRAM_SIZE +# warning "CONFIG_DRAM_SIZE is larger than the size of CPU SRAM" +# undef CONFIG_DRAM_SIZE # undef CONFIG_DRAM_END -# define CONFIG_DRAM_END (LPC17_SRAM_BASE+LPC17_SRAM_SIZE) -#elif CONFIG_DRAM_END < (LPC17_SRAM_BASE+LPC17_SRAM_SIZE) +# define CONFIG_DRAM_SIZE LPC17_CPUSRAM_SIZE +# define CONFIG_DRAM_END (LPC17_SRAM_BASE+LPC17_CPUSRAM_SIZE) +#elif CONFIG_DRAM_SIZE < LPC17_CPUSRAM_SIZE # warning "CONFIG_DRAM_END is before end of CPU SRAM... not all of CPU SRAM used" #endif @@ -67,7 +81,9 @@ # endif #else # if CONFIG_MM_REGIONS > 1 -# warning "CONFIG_MM_REGIONS > 1: This MCH has no AHB SRAM Bank0" +# warning "CONFIG_MM_REGIONS > 1: This MCU has no AHB SRAM Bank0" +# undef CONFIG_MM_REGIONS +# define CONFIG_MM_REGIONS 1 # endif #endif @@ -77,7 +93,9 @@ # endif #else # if CONFIG_MM_REGIONS > 2 -# warning "CONFIG_MM_REGIONS > 2: This MCH has no AHB SRAM Bank1" +# warning "CONFIG_MM_REGIONS > 2: This MCU has no AHB SRAM Bank1" +# undef CONFIG_MM_REGIONS +# define CONFIG_MM_REGIONS 2 # endif #endif |