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authorpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-02-24 17:30:55 +0000
committerpatacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>2013-02-24 17:30:55 +0000
commit709f5259f948dd3ee2b7e8b7869b00427a6c97d2 (patch)
treec76868ef095120117eae3aad4fc3b5086961f2a8 /nuttx/arch/arm/src/nuc1xx/chip
parentd64e8a37f973d1b0394cb582fb6f5e94fd057c1b (diff)
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More Cortex-M0/NUC120 progress
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5669 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/nuc1xx/chip')
-rw-r--r--nuttx/arch/arm/src/nuc1xx/chip/nuc_clk.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/nuc1xx/chip/nuc_clk.h b/nuttx/arch/arm/src/nuc1xx/chip/nuc_clk.h
index 17814a467..426efd782 100644
--- a/nuttx/arch/arm/src/nuc1xx/chip/nuc_clk.h
+++ b/nuttx/arch/arm/src/nuc1xx/chip/nuc_clk.h
@@ -47,6 +47,11 @@
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
+/* Well-known clock frequencies *************************************************************/
+
+#define NUC_INTHI_FREQUENCY 22118400
+#define NUC_INTLO_FREQUENCY 10000
+
/* Register offsets *************************************************************************/
#define NUC_CLK_PWRCON_OFFSET 0x0000 /* System power down control register */