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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-05-16 15:09:39 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-05-16 15:09:39 +0000 |
commit | 3119f7b909d6c8938ae92e45b1e92dc1bcba0c0b (patch) | |
tree | daf7f588b941cdac94651ca15cc46364c56772f6 /nuttx/arch/arm/src/stm32/stm32_spi.c | |
parent | c91f7947992488ba67e82f4c56c94cd64d385ffc (diff) | |
download | px4-nuttx-3119f7b909d6c8938ae92e45b1e92dc1bcba0c0b.tar.gz px4-nuttx-3119f7b909d6c8938ae92e45b1e92dc1bcba0c0b.tar.bz2 px4-nuttx-3119f7b909d6c8938ae92e45b1e92dc1bcba0c0b.zip |
Add initial CC1101 wireless logic from Uros
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3617 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_spi.c')
-rwxr-xr-x | nuttx/arch/arm/src/stm32/stm32_spi.c | 26 |
1 files changed, 8 insertions, 18 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_spi.c b/nuttx/arch/arm/src/stm32/stm32_spi.c index 1317ef094..b4ba555af 100755 --- a/nuttx/arch/arm/src/stm32/stm32_spi.c +++ b/nuttx/arch/arm/src/stm32/stm32_spi.c @@ -1289,9 +1289,9 @@ static void spi_portinitialize(FAR struct stm32_spidev_s *priv) FAR struct spi_dev_s *up_spiinitialize(int port) { FAR struct stm32_spidev_s *priv = NULL; - irqstate_t flags; - flags = irqsave(); + irqstate_t flags = irqsave(); + #ifdef CONFIG_STM32_SPI1 if (port == 1) { @@ -1301,16 +1301,6 @@ FAR struct spi_dev_s *up_spiinitialize(int port) priv = &g_spi1dev; - /* Handle pin mapping */ - - mapr = getreg32(STM32_AFIO_MAPR); -#ifdef CONFIG_STM32_SPI1_REMAP - mapr |= AFIO_MAPR_SPI1_REMAP; -#else - mapr &= ~AFIO_MAPR_SPI1_REMAP; -#endif - putreg32(mapr, STM32_AFIO_MAPR); - /* Configure SPI1 pins: SCK, MISO, and MOSI */ stm32_configgpio(GPIO_SPI1_SCK); @@ -1330,6 +1320,12 @@ FAR struct spi_dev_s *up_spiinitialize(int port) priv = &g_spi2dev; + /* Configure SPI2 pins: SCK, MISO, and MOSI */ + + stm32_configgpio(GPIO_SPI2_SCK); + stm32_configgpio(GPIO_SPI2_MISO); + stm32_configgpio(GPIO_SPI2_MOSI); + /* Set up default configuration: Master, 8-bit, etc. */ spi_portinitialize(priv); @@ -1343,12 +1339,6 @@ FAR struct spi_dev_s *up_spiinitialize(int port) priv = &g_spi3dev; - /* Handle pin mapping */ - -#ifdef CONFIG_STM32_SPI3_REMAP -# error "Available only in connectivity devices" -#endif - /* Configure SPI3 pins: SCK, MISO, and MOSI */ stm32_configgpio(GPIO_SPI3_SCK); |