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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-10-10 18:42:36 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-10-10 18:42:36 +0000 |
| commit | 825cd6c478c17dc00135182595c796fcd023854e (patch) | |
| tree | b84f2666b201df856d825d7e2444c0df24c463be /nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h | |
| parent | ff641f36093e5a01fed6f896ba0b6a1f7969144f (diff) | |
| download | px4-nuttx-825cd6c478c17dc00135182595c796fcd023854e.tar.gz px4-nuttx-825cd6c478c17dc00135182595c796fcd023854e.tar.bz2 px4-nuttx-825cd6c478c17dc00135182595c796fcd023854e.zip | |
Adding support of PIC32MX5xx/6xx/7xx families
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4035 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h')
| -rw-r--r-- | nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h b/nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h index f738506c7..472d607d1 100644 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-memorymap.h @@ -149,8 +149,6 @@ /* Comparator Register Base Addresses */ # define PIC32MX_CM_K1BASE (PIC32MX_SFR_K1BASE + 0x0000a000) -# define PIC32MX_CM1_K1BASE (PIC32MX_SFR_K1BASE + 0x0000a000) -# define PIC32MX_CM2_K1BASE (PIC32MX_SFR_K1BASE + 0x0000a010) /* Oscillator Control Register Base Addresses */ @@ -264,6 +262,7 @@ # define PIC32MX_SPI3_K1BASE (PIC32MX_SFR_K1BASE + 0x00005800) # define PIC32MX_SPI2_K1BASE (PIC32MX_SFR_K1BASE + 0x00005a00) # define PIC32MX_SPI4_K1BASE (PIC32MX_SFR_K1BASE + 0x00005c00) +# define PIC32MX_SPI1_K1BASE (PIC32MX_SFR_K1BASE + 0x00005e00) /* UART 1-6 Register Base Addresses */ @@ -289,8 +288,6 @@ /* Comparator Register Base Addresses */ # define PIC32MX_CM_K1BASE (PIC32MX_SFR_K1BASE + 0x0000a000) -# define PIC32MX_CM1_K1BASE (PIC32MX_SFR_K1BASE + 0x0000a000) -# define PIC32MX_CM2_K1BASE (PIC32MX_SFR_K1BASE + 0x0000a010) /* Oscillator Control Register Base Addresses */ @@ -324,6 +321,10 @@ # define PIC32MX_DMACH1_K1BASE (PIC32MX_SFR_K1BASE + 0x00083120) # define PIC32MX_DMACH2_K1BASE (PIC32MX_SFR_K1BASE + 0x000831e0) # define PIC32MX_DMACH3_K1BASE (PIC32MX_SFR_K1BASE + 0x000832a0) +# define PIC32MX_DMACH4_K1BASE (PIC32MX_SFR_K1BASE + 0x00083360) +# define PIC32MX_DMACH5_K1BASE (PIC32MX_SFR_K1BASE + 0x00083420) +# define PIC32MX_DMACH6_K1BASE (PIC32MX_SFR_K1BASE + 0x000834e0) +# define PIC32MX_DMACH7_K1BASE (PIC32MX_SFR_K1BASE + 0x000835a0) /* Prefetch Cache Register Base Address */ |