Fix UART pin configuration

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1856 42af7a65-404d-4744-a932-0658087f49c3

5 files changed, 29 insertions, 19 deletions

diff --git a/nuttx/arch/arm/src/str71x/str71x_decodeirq.c b/nuttx/arch/arm/src/str71x/str71x_decodeirq.c
index 92cc5c70e..ac53bf0de 100644
--- a/nuttx/arch/arm/src/str71x/str71x_decodeirq.c
+++ b/nuttx/arch/arm/src/str71x/str71x_decodeirq.c
@@ -1,7 +1,7 @@
 /********************************************************************************
  * arch/arm/src/str71x/str71x_decodeirq.c
  *
- *   Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -95,7 +95,7 @@ void up_decodeirq(uint32 *regs)
   unsigned int irq;
 
   /* Read the IRQ number from the IVR register (Could probably get the same
-   * info from CIC register without the setup.
+   * info from CIC register without the setup).
    */
 
   up_ledon(LED_INIRQ);
diff --git a/nuttx/arch/arm/src/str71x/str71x_eic.h b/nuttx/arch/arm/src/str71x/str71x_eic.h
index 3ceffacd2..74cf59257 100644
--- a/nuttx/arch/arm/src/str71x/str71x_eic.h
+++ b/nuttx/arch/arm/src/str71x/str71x_eic.h
@@ -147,6 +147,10 @@
 #define STR71X_EICICR_IRQEN        (0x00000001) /* Bit 0: IRQ output enable */

 #define STR71X_EICICR_FIQEN        (0x00000002) /* Bit 1: FIQ output enable */

 

+/* Current interrupt channel register (CICR) bit definitions */

+

+#define STR71X_EICCICR_MASK        0x1f         /* Bits: 0-4: CIC */

+

 /* Fast interrupt register (FIR) bit definitions */

 

 #define STR71X_EICFIR_FIE          (0x00000001) /* Bit 0: FIQ channel 1/0 enable */

diff --git a/nuttx/arch/arm/src/str71x/str71x_lowputc.c b/nuttx/arch/arm/src/str71x/str71x_lowputc.c
index 740155e8d..b12936653 100644
--- a/nuttx/arch/arm/src/str71x/str71x_lowputc.c
+++ b/nuttx/arch/arm/src/str71x/str71x_lowputc.c
@@ -72,12 +72,16 @@
 #  undef HAVE_CONSOLE
 #endif
 
-/* GPIO0 UART configuration bits */
+/* GPIO0 UART configuration bits.  For each enabled UART:
+ *
+ *   TX needs to be configured for alternate function, push-pull {1, 1, 1}
+ *   RX needs to be configured for input, tristate, cmos {0, 1, 0}
+ */
 
 #if CONFIG_STR71X_UART0
 #  define STR71X_UART0_GPIO0_MASK    (0x0300)        /* P0.8->U0.TX, B0.9->U0.RX */
-#  define STR71X_UART0_GPIO0_PC0BITS (0x0300)
-#  define STR71X_UART0_GPIO0_PC1BITS (0x0200)
+#  define STR71X_UART0_GPIO0_PC0BITS (0x0200)
+#  define STR71X_UART0_GPIO0_PC1BITS (0x0300)
 #  define STR71X_UART0_GPIO0_PC2BITS (0x0200)
 #else
 #  define STR71X_UART0_GPIO0_MASK    (0)
@@ -88,8 +92,8 @@
 
 #if CONFIG_STR71X_UART1
 #  define STR71X_UART1_GPIO0_MASK    (0x0c00)        /* P0,10->U1.RX, P0.11->U1.TX */
-#  define STR71X_UART1_GPIO0_PC0BITS (0x0c00)
-#  define STR71X_UART1_GPIO0_PC1BITS (0x0800)
+#  define STR71X_UART1_GPIO0_PC0BITS (0x0800)
+#  define STR71X_UART1_GPIO0_PC1BITS (0x0c00)
 #  define STR71X_UART1_GPIO0_PC2BITS (0x0800)
 #else
 #  define STR71X_UART1_GPIO0_MASK    (0)
@@ -100,8 +104,8 @@
 
 #if CONFIG_STR71X_UART2
 #  define STR71X_UART2_GPIO0_MASK    (0x6000)        /* P0.13->U2.RX, P0.14>U2.TX */
-#  define STR71X_UART2_GPIO0_PC0BITS (0x6000)
-#  define STR71X_UART2_GPIO0_PC1BITS (0x4000)
+#  define STR71X_UART2_GPIO0_PC0BITS (0x4000)
+#  define STR71X_UART2_GPIO0_PC1BITS (0x6000)
 #  define STR71X_UART2_GPIO0_PC2BITS (0x4000)
 #else
 #  define STR71X_UART2_GPIO0_MASK    (0)
@@ -112,8 +116,8 @@
 
 #if CONFIG_STR71X_UART3
 #  define STR71X_UART3_GPIO0_MASK    (0x0003)        /* P0.0->U3.TX, P0.1->U3.RX */
-#  define STR71X_UART3_GPIO0_PC0BITS (0x0003)
-#  define STR71X_UART3_GPIO0_PC1BITS (0x0001)
+#  define STR71X_UART3_GPIO0_PC0BITS (0x0001)
+#  define STR71X_UART3_GPIO0_PC1BITS (0x0003)
 #  define STR71X_UART3_GPIO0_PC2BITS (0x0001)
 #else
 #  define STR71X_UART3_GPIO0_MASK    (0)
@@ -126,10 +130,10 @@
                                       STR71X_UART2_GPIO0_MASK   |STR71X_UART3_GPIO0_MASK)
 #define STR71X_UART_GPIO0_PC0BITS    (STR71X_UART0_GPIO0_PC0BITS|STR71X_UART1_GPIO0_PC0BITS|\
                                       STR71X_UART2_GPIO0_PC0BITS|STR71X_UART3_GPIO0_PC0BITS)
-#define STR71X_UART_GPIO0_PC1BITS    (STR71X_UART0_GPIO0_PC0BITS|STR71X_UART1_GPIO0_PC0BITS|\
-                                      STR71X_UART2_GPIO0_PC0BITS|STR71X_UART3_GPIO0_PC0BITS)
-#define STR71X_UART_GPIO0_PC2BITS    (STR71X_UART0_GPIO0_PC0BITS|STR71X_UART1_GPIO0_PC0BITS|\
-                                      STR71X_UART2_GPIO0_PC0BITS|STR71X_UART3_GPIO0_PC0BITS)
+#define STR71X_UART_GPIO0_PC1BITS    (STR71X_UART0_GPIO0_PC1BITS|STR71X_UART1_GPIO0_PC1BITS|\
+                                      STR71X_UART2_GPIO0_PC1BITS|STR71X_UART3_GPIO0_PC1BITS)
+#define STR71X_UART_GPIO0_PC2BITS    (STR71X_UART0_GPIO0_PC2BITS|STR71X_UART1_GPIO0_PC2BITS|\
+                                      STR71X_UART2_GPIO0_PC2BITS|STR71X_UART3_GPIO0_PC2BITS)
 
 /* Select UART parameters for the selected console */
 
diff --git a/nuttx/arch/arm/src/str71x/str71x_serial.c b/nuttx/arch/arm/src/str71x/str71x_serial.c
index c803a7277..1f82f7f4f 100644
--- a/nuttx/arch/arm/src/str71x/str71x_serial.c
+++ b/nuttx/arch/arm/src/str71x/str71x_serial.c
@@ -77,9 +77,11 @@
 #  undef HAVE_CONSOLE
 #endif
 
+/* Did the user select a priority? */
+
 #ifndef CONFIG_UART_PRI
 #  define CONFIG_UART_PRI 1
-#elif CONFIG_UART_PRI <= 1 && CONFIG_UART_PRI >15
+#elif CONFIG_UART_PRI <= 1 || CONFIG_UART_PRI > 15
 #  error "CONFIG_UART_PRI is out of range"
 #endif
 
@@ -525,8 +527,8 @@ static int up_setup(struct uart_dev_s *dev)
 
   /* Clear FIFOs */
 
-  up_serialout(priv, STR71X_UART_TXRSTR_OFFSET, 0);
-  up_serialout(priv, STR71X_UART_RXRSTR_OFFSET, 0);
+  up_serialout(priv, STR71X_UART_TXRSTR_OFFSET, 0xffff);
+  up_serialout(priv, STR71X_UART_RXRSTR_OFFSET, 0xffff);
 
   /* We will take RX interrupts on either the FIFO half full or upon
    * a timeout.  The timeout is based upon BAUD rate ticks
diff --git a/nuttx/arch/arm/src/str71x/str71x_timerisr.c b/nuttx/arch/arm/src/str71x/str71x_timerisr.c
index 1777be159..7add001c8 100644
--- a/nuttx/arch/arm/src/str71x/str71x_timerisr.c
+++ b/nuttx/arch/arm/src/str71x/str71x_timerisr.c
@@ -59,7 +59,7 @@
 
 #ifndef CONFIG_TIM_PRI
 #  define CONFIG_TIM_PRI 1
-#elif CONFIG_TIM_PRI <= 1 && CONFIG_TIM_PRI >15
+#elif CONFIG_TIM_PRI <= 1 || CONFIG_TIM_PRI > 15
 #  error "CONFIG_TIM_PRI is out of range"
 #endif