Add basic Kinetis serial support

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3878 42af7a65-404d-4744-a932-0658087f49c3

8 files changed, 1702 insertions, 80 deletions

diff --git a/nuttx/arch/arm/src/kinetis/Make.defs b/nuttx/arch/arm/src/kinetis/Make.defs
index d0c9d94b6..3af81c78f 100644
--- a/nuttx/arch/arm/src/kinetis/Make.defs
+++ b/nuttx/arch/arm/src/kinetis/Make.defs
@@ -40,13 +40,13 @@ HEAD_ASRC	= kinetis_vectors.S
 # Common ARM and Cortex-M3 files
 
 CMN_ASRCS	= up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
-CMN_CSRCS	= up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
-		  up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c \
-		  up_initialstate.c up_interruptcontext.c up_modifyreg8.c \
-		  up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
+CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
+		  up_createstack.c up_mdelay.c up_udelay.c up_exit.c up_initialize.c \
+		  up_memfault.c up_initialstate.c up_interruptcontext.c \
+		  up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
 		  up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
-		  up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
-		  up_hardfault.c up_svcall.c up_checkstack.c
+		  up_releasepending.c up_sigdeliver.c up_unblocktask.c up_usestack.c \
+		  up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c
 
 ifeq ($(CONFIG_NET),y)
 ifneq ($(CONFIG_KINETIS_ETHERNET),y)
@@ -57,10 +57,9 @@ endif
 # Required Kinetis files
 
 CHIP_ASRCS	=
-#CHIP_CSRCS	= kinetis_allocateheap.c kinetis_can.c kinetis_gpio.c \
-#		  kinetis_serial.c kinetis_spi.c kinetis_ssp.c kinetis_timerisr.c
-CHIP_CSRCS	= kinetis_clockconfig.c kinetis_clrpend.c kinetis_idle.c kinetis_irq.c \
-		  kinetis_lowputc.c kinetis_start.c kinetis_wdog.c
+CHIP_CSRCS	= kinetis_clockconfig.c kinetis_clrpend.c kinetis_gpio.c \
+		  kinetis_idle.c kinetis_irq.c kinetis_lowputc.c kinetis_serial.c \
+		  kinetis_start.c kinetis_timerisr.c kinetis_wdog.c
 
 # Configuration-dependent Kinetis files
 
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_config.h b/nuttx/arch/arm/src/kinetis/kinetis_config.h
index e599294d1..bad3fbf3c 100755
--- a/nuttx/arch/arm/src/kinetis/kinetis_config.h
+++ b/nuttx/arch/arm/src/kinetis/kinetis_config.h
@@ -94,42 +94,42 @@
 #  undef CONFIG_UART3_SERIAL_CONSOLE

 #  undef CONFIG_UART4_SERIAL_CONSOLE

 #  undef CONFIG_UART5_SERIAL_CONSOLE

-#  define HAVE_CONSOLE 1

+#  define HAVE_SERIAL_CONSOLE 1

 #elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART1)

 #  undef CONFIG_UART0_SERIAL_CONSOLE

 #  undef CONFIG_UART2_SERIAL_CONSOLE

 #  undef CONFIG_UART3_SERIAL_CONSOLE

 #  undef CONFIG_UART4_SERIAL_CONSOLE

 #  undef CONFIG_UART5_SERIAL_CONSOLE

-#  define HAVE_CONSOLE 1

+#  define HAVE_SERIAL_CONSOLE 1

 #elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART2)

 #  undef CONFIG_UART0_SERIAL_CONSOLE

 #  undef CONFIG_UART1_SERIAL_CONSOLE

 #  undef CONFIG_UART3_SERIAL_CONSOLE

 #  undef CONFIG_UART4_SERIAL_CONSOLE

 #  undef CONFIG_UART5_SERIAL_CONSOLE

-#  define HAVE_CONSOLE 1

+#  define HAVE_SERIAL_CONSOLE 1

 #elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART3)

 #  undef CONFIG_UART0_SERIAL_CONSOLE

 #  undef CONFIG_UART1_SERIAL_CONSOLE

 #  undef CONFIG_UART2_SERIAL_CONSOLE

 #  undef CONFIG_UART4_SERIAL_CONSOLE

 #  undef CONFIG_UART5_SERIAL_CONSOLE

-#  define HAVE_CONSOLE 1

+#  define HAVE_SERIAL_CONSOLE 1

 #elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART4)

 #  undef CONFIG_UART0_SERIAL_CONSOLE

 #  undef CONFIG_UART1_SERIAL_CONSOLE

 #  undef CONFIG_UART2_SERIAL_CONSOLE

 #  undef CONFIG_UART3_SERIAL_CONSOLE

 #  undef CONFIG_UART5_SERIAL_CONSOLE

-#  define HAVE_CONSOLE 1

+#  define HAVE_SERIAL_CONSOLE 1

 #elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART5)

 #  undef CONFIG_UART0_SERIAL_CONSOLE

 #  undef CONFIG_UART1_SERIAL_CONSOLE

 #  undef CONFIG_UART2_SERIAL_CONSOLE

 #  undef CONFIG_UART3_SERIAL_CONSOLE

 #  undef CONFIG_UART4_SERIAL_CONSOLE

-#  define HAVE_CONSOLE 1

+#  define HAVE_SERIAL_CONSOLE 1

 #else

 #  undef CONFIG_UART0_SERIAL_CONSOLE

 #  undef CONFIG_UART1_SERIAL_CONSOLE

@@ -137,7 +137,7 @@
 #  undef CONFIG_UART3_SERIAL_CONSOLE

 #  undef CONFIG_UART4_SERIAL_CONSOLE

 #  undef CONFIG_UART5_SERIAL_CONSOLE

-#  undef HAVE_CONSOLE

+#  undef HAVE_SERIAL_CONSOLE

 #endif

 

 /* Check UART flow control (Not yet supported) */

diff --git a/nuttx/arch/arm/src/kinetis/kinetis_gpio.c b/nuttx/arch/arm/src/kinetis/kinetis_gpio.c
new file mode 100755
index 000000000..dbfc693f1
--- /dev/null
+++ b/nuttx/arch/arm/src/kinetis/kinetis_gpio.c
@@ -0,0 +1,106 @@
+/****************************************************************************

+ *  arch/arm/src/kinetis/kinetis_gpio.c

+ *

+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.

+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>

+ *

+ * Redistribution and use in source and binary forms, with or without

+ * modification, are permitted provided that the following conditions

+ * are met:

+ *

+ * 1. Redistributions of source code must retain the above copyright

+ *    notice, this list of conditions and the following disclaimer.

+ * 2. Redistributions in binary form must reproduce the above copyright

+ *    notice, this list of conditions and the following disclaimer in

+ *    the documentation and/or other materials provided with the

+ *    distribution.

+ * 3. Neither the name NuttX nor the names of its contributors may be

+ *    used to endorse or promote products derived from this software

+ *    without specific prior written permission.

+ *

+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS

+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,

+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS

+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN

+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

+ * POSSIBILITY OF SUCH DAMAGE.

+ *

+ ****************************************************************************/

+

+/****************************************************************************

+ * Included Files

+ ****************************************************************************/

+

+#include <nuttx/config.h>

+#include <arch/board/board.h>

+

+#include <errno.h>

+

+#include <nuttx/arch.h>

+

+#include "up_internal.h"

+#include "kinetis_gpio.h"

+

+/****************************************************************************

+ * Pre-processor Definitions

+ ****************************************************************************/

+

+/****************************************************************************

+ * Private Data

+ ****************************************************************************/

+

+/****************************************************************************

+ * Private Functions

+ ****************************************************************************/

+

+/****************************************************************************

+ * Public Functions

+ ****************************************************************************/

+

+/****************************************************************************

+ * Name: kinetis_configgpio

+ *

+ * Description:

+ *   Configure a GPIO pin based on bit-encoded description of the pin.

+ *

+ ****************************************************************************/

+

+int kinetis_configgpio(uint32_t cfgset)

+{

+# warning "Missing logic"

+  return -ENOSYS;

+}

+

+/****************************************************************************

+ * Name: kinetis_gpiowrite

+ *

+ * Description:

+ *   Write one or zero to the selected GPIO pin

+ *

+ ****************************************************************************/

+

+void kinetis_gpiowrite(uint32_t pinset, bool value)

+{

+# warning "Missing logic"

+}

+

+/****************************************************************************

+ * Name: kinetis_gpioread

+ *

+ * Description:

+ *   Read one or zero from the selected GPIO pin

+ *

+ ****************************************************************************/

+

+bool kinetis_gpioread(uint32_t pinset)

+{

+# warning "Missing logic"

+  return false;

+}

+

diff --git a/nuttx/arch/arm/src/kinetis/kinetis_internal.h b/nuttx/arch/arm/src/kinetis/kinetis_internal.h
index 09eb37a13..c3036a6ec 100644
--- a/nuttx/arch/arm/src/kinetis/kinetis_internal.h
+++ b/nuttx/arch/arm/src/kinetis/kinetis_internal.h
@@ -332,9 +332,9 @@ EXTERN void kinetis_uartreset(uintptr_t uart_base);
  ******************************************************************************/
 
 #ifdef HAVE_UART_DEVICE
-EXTERN void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
-                                  unsigned int parity, unsigned int nbits,
-                                  bool stop2);
+EXTERN void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
+                                  uint32_t clock, unsigned int parity,
+                                  unsigned int nbits);
 #endif
 
 /************************************************************************************
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_lowputc.c b/nuttx/arch/arm/src/kinetis/kinetis_lowputc.c
index 712865818..e0095c11f 100755
--- a/nuttx/arch/arm/src/kinetis/kinetis_lowputc.c
+++ b/nuttx/arch/arm/src/kinetis/kinetis_lowputc.c
@@ -50,6 +50,7 @@
 #include "kinetis_config.h"
 #include "kinetis_internal.h"
 #include "kinetis_uart.h"
+#include "kinetis_sim.h"
 #include "kinetis_pinmux.h"
 
 /**************************************************************************
@@ -60,56 +61,44 @@
 
 #if defined(CONFIG_UART0_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART0_BASE
+#  define CONSOLE_FREQ     BOARD_CORECLK_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART0_BAUD
 #  define CONSOLE_BITS     CONFIG_UART0_BITS
 #  define CONSOLE_PARITY   CONFIG_UART0_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART0_2STOP
 #elif defined(CONFIG_UART1_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART1_BASE
+#  define CONSOLE_FREQ     BOARD_CORECLK_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART1_BAUD
 #  define CONSOLE_BITS     CONFIG_UART1_BITS
 #  define CONSOLE_PARITY   CONFIG_UART1_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART1_2STOP
 #elif defined(CONFIG_UART2_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART2_BASE
+#  define CONSOLE_FREQ     BOARD_BUS_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART2_BAUD
 #  define CONSOLE_BITS     CONFIG_UART2_BITS
 #  define CONSOLE_PARITY   CONFIG_UART2_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART2_2STOP
 #elif defined(CONFIG_UART3_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART3_BASE
+#  define CONSOLE_FREQ     BOARD_BUS_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART3_BAUD
 #  define CONSOLE_BITS     CONFIG_UART3_BITS
 #  define CONSOLE_PARITY   CONFIG_UART3_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART3_2STOP
 #elif defined(CONFIG_UART4_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART4_BASE
+#  define CONSOLE_FREQ     BOARD_BUS_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART4_BAUD
 #  define CONSOLE_BITS     CONFIG_UART4_BITS
 #  define CONSOLE_PARITY   CONFIG_UART4_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART4_2STOP
 #elif defined(CONFIG_UART5_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART5_BASE
+#  define CONSOLE_FREQ     BOARD_BUS_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART5_BAUD
 #  define CONSOLE_BITS     CONFIG_UART5_BITS
 #  define CONSOLE_PARITY   CONFIG_UART5_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART5_2STOP
-#elif defined(HAVE_CONSOLE)
+#elif defined(HAVE_SERIAL_CONSOLE)
 #  error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
 #endif
 
-/* Get word length setting for the console */
-# warning "Missing logic"
-
-/* Get parity setting for the console */
-# warning "Missing logic"
-
-/* Get stop-bit setting for the console and UART0-3 */
-# warning "Missing logic"
-
-/* Select a divider to produce the UART CLK */
-# warning "Missing logic"
-
 /**************************************************************************
  * Private Types
  **************************************************************************/
@@ -144,8 +133,19 @@
 
 void up_lowputc(char ch)
 {
-#if defined HAVE_UART_DEVICE && defined HAVE_CONSOLE
-# warning "Missing logic"
+#if defined HAVE_UART_DEVICE && defined HAVE_SERIAL_CONSOLE
+
+  /* Wait until the transmit data register is "empty."  This state depends
+   * on the TX watermark setting and does not mean that the transmit buffer
+   * is really empty.  It just means that we can now add another character
+   * to the transmit buffer
+   */
+
+  while ((getreg8(CONSOLE_BASE+KINETIS_UART_S1_OFFSET) & UART_S1_TDRE) == 0);
+
+ /* Then write the character to the UART data register */
+
+  putreg8((uint8_t)ch, CONSOLE_BASE+KINETIS_UART_D_OFFSET);
 #endif
 }
 
@@ -182,13 +182,46 @@ void up_lowputc(char ch)
 void kinetis_lowsetup(void)
 {
 #ifdef HAVE_UART_DEVICE
-  /* Step 1: Enable power for all enabled UARTs */
+  uint32_t regval;
+
+  /* Enable peripheral clocking for all enabled UARTs.  Clocking for UARTs
+   * 0-3 is enabled in the SCGC4 register.
+   */
+
+#if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
+    defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3)
+
+   regval = getreg32(KINETIS_SIM_SCGC4);
+#  ifdef CONFIG_KINETIS_UART0
+   regval |= SIM_SCGC4_UART0;
+#  endif
+#  ifdef CONFIG_KINETIS_UART1
+   regval |= SIM_SCGC4_UART1;
+#  endif
+#  ifdef CONFIG_KINETIS_UART2
+   regval |= SIM_SCGC4_UART2;
+#  endif
+#  ifdef CONFIG_KINETIS_UART3
+   regval |= SIM_SCGC4_UART3;
+#  endif
+   putreg32(regval, KINETIS_SIM_SCGC4);
+
+#endif
 
-# warning "Missing logic"
+  /* Clocking for UARTs 4-5 is enabled in the SCGC1 register. */
 
-  /* Step 2: Enable peripheral clocking for all enabled UARTs */
+#if defined(CONFIG_KINETIS_UART4) || defined(CONFIG_KINETIS_UART5)
 
-# warning "Missing logic"
+   regval = getreg32(KINETIS_SIM_SCGC4);
+#  ifdef CONFIG_KINETIS_UART4
+   regval |= SIM_SCGC1_UART4;
+#  endif
+#  ifdef CONFIG_KINETIS_UART5
+   regval |= SIM_SCGC1_UART5;
+#  endif
+   putreg32(regval, KINETIS_SIM_SCGC4);
+
+#endif
 
   /* Configure UART pins for the all enabled UARTs */
 
@@ -217,12 +250,14 @@ void kinetis_lowsetup(void)
   kinetis_configgpio(GPIO_UART5_RX);
 #endif
 
-  /* Configure the console (only) */
+  /* Configure the console (only) now.  Other UARTs will be configured
+   * when the serial driver is opened.
+   */
 
-#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
 
-  kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_PARITY,
-                        CONSOLE_BITS, CONSOLE_2STOP);
+  kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ,
+                        CONSOLE_PARITY, CONSOLE_BITS);
 #endif
 #endif /* HAVE_UART_DEVICE */
 }
@@ -238,7 +273,13 @@ void kinetis_lowsetup(void)
 #ifdef HAVE_UART_DEVICE
 void kinetis_uartreset(uintptr_t uart_base)
 {
-# warning "Missing logic"
+  uint8_t regval;
+
+  /* Just disable the transmitter and receiver */
+
+  regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
+  regval &= ~(UART_C2_RE|UART_C2_TE);
+  putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
 }
 #endif
 
@@ -251,11 +292,103 @@ void kinetis_uartreset(uintptr_t uart_base)
  ******************************************************************************/
 
 #ifdef HAVE_UART_DEVICE
-void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
-                           unsigned int parity, unsigned int nbits,
-                           bool stop2)
+void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
+                           uint32_t clock, unsigned int parity,
+                           unsigned int nbits)
 {
-# warning "Missing logic"
+  uint32_t sbr;
+  uint32_t brfa;
+  uint32_t tmp;
+  uint8_t  regval;
+
+  /* Disable the transmitter and receiver throughout the reconfiguration */
+
+  regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
+  regval &= ~(UART_C2_RE|UART_C2_TE);
+  putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
+
+  /* Configure number of bits, stop bits and parity */
+
+  regval = 0;
+
+  /* Check for odd parity */
+
+  if (parity == 1)
+    {
+      regval |= (UART_C1_PE|UART_C1_PT); /* Enable + odd parity type */
+    }
+
+  /* Check for even parity */
+
+  else if (parity == 2)
+    {
+      regval |= UART_C1_PE;              /* Enable (even parity default) */
+    }
+
+  /* The only other option is no parity */
+
+  else
+    {
+      DEBUGASSERT(parity == 0);
+    }
+
+  /* Check for 9-bit operation */
+
+  if (nbits == 9)
+    {
+      regval |= UART_C1_M;
+    }
+  
+  /* The only other option is 8-bit operation */
+
+  else
+    {
+      DEBUGASSERT(nbits == 8);
+    }
+
+  putreg8(regval, uart_base+KINETIS_UART_C1_OFFSET);
+
+  /* Calculate baud settings (truncating) */
+
+  sbr = clock / (baud << 4);
+  DEBUGASSERT(sbr < 0x2000);
+        
+  /* Save the new baud divisor, retaining other bits in the UARTx_BDH
+   * register.
+   */
+
+  regval  = getreg8(uart_base+KINETIS_UART_BDH_OFFSET) & UART_BDH_SBR_MASK;
+  tmp     = sbr >> 8;
+  regval |= (((uint8_t)tmp) << UART_BDH_SBR_SHIFT) & UART_BDH_SBR_MASK;
+  putreg8(regval, uart_base+KINETIS_UART_BDH_OFFSET);
+
+  tmp    = sbr & 0xff;
+  putreg8(regval, uart_base+KINETIS_UART_BDL_OFFSET);
+    
+  /* Calculate a fractional divider to get closer to the requested baud.
+   * The fractional divider, BRFA, is a 5 bit fractional value that is
+   * logically added to the SBR:
+   *
+   *   UART baud rate = clock / (16 × (SBR + BRFD))
+   *
+   * The BRFA the remainder.  This will be a non-negative value since the SBR
+   * was calculated by truncation.
+   */
+
+  tmp  = clock - (sbr * (baud << 4));
+  brfa = (tmp << 5) / (baud << 4);
+    
+  /* Set the BRFA field (retaining other bits in the UARTx_C4 register) */
+
+  regval  = getreg8(uart_base+KINETIS_UART_C4_OFFSET) & UART_C4_BRFA_MASK;
+  regval |= ((uint8_t)brfa << UART_C4_BRFA_SHIFT) & UART_C4_BRFA_MASK;
+  putreg8(regval, uart_base+KINETIS_UART_C4_OFFSET);
+
+  /* Now we can re-enable the transmitter and receiver */
+
+  regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
+  regval |= (UART_C2_RE|UART_C2_TE);
+  putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
 }
 #endif
 
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_serial.c b/nuttx/arch/arm/src/kinetis/kinetis_serial.c
new file mode 100644
index 000000000..6c9e4af94
--- /dev/null
+++ b/nuttx/arch/arm/src/kinetis/kinetis_serial.c
@@ -0,0 +1,1237 @@
+/****************************************************************************
+ * arch/mips/src/kinetis/kinetis_serial.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <unistd.h>
+#include <semaphore.h>
+#include <string.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <nuttx/serial.h>
+
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "up_internal.h"
+#include "os_internal.h"
+
+#include "kinetis_config.h"
+#include "chip.h"
+#include "kinetis_uart.h"
+#include "kinetis_internal.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+/* Some sanity checks *******************************************************/
+/* Is there at least one UART enabled and configured as a RS-232 device? */
+
+#ifndef HAVE_UART_DEVICE
+#  warning "No UARTs enabled"
+#endif
+
+/* If we are not using the serial driver for the console, then we still must
+ * provide some minimal implementation of up_putc.
+ */
+
+#ifdef CONFIG_USE_SERIALDRIVER
+
+/* Which UART with be tty0/console and which tty1-4?  The console will always
+ * be ttyS0.  If there is no console then will use the lowest numbered UART.
+ */
+
+/* First pick the console and ttys0.  This could be any of UART0-5 */
+
+#if defined(CONFIG_UART0_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart0port /* UART0 is console */
+#    define TTYS0_DEV           g_uart0port /* UART0 is ttyS0 */
+#    define UART0_ASSIGNED      1
+#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart1port /* UART1 is console */
+#    define TTYS0_DEV           g_uart1port /* UART1 is ttyS0 */
+#    define UART1_ASSIGNED      1
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart2port /* UART2 is console */
+#    define TTYS0_DEV           g_uart2port /* UART2 is ttyS0 */
+#    define UART2_ASSIGNED      1
+#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart3port /* UART3 is console */
+#    define TTYS0_DEV           g_uart3port /* UART3 is ttyS0 */
+#    define UART3_ASSIGNED      1
+#elif defined(CONFIG_UART4_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart4port /* UART4 is console */
+#    define TTYS0_DEV           g_uart4port /* UART4 is ttyS0 */
+#    define UART4_ASSIGNED      1
+#elif defined(CONFIG_UART5_SERIAL_CONSOLE)
+#    define CONSOLE_DEV         g_uart5port /* UART5 is console */
+#    define TTYS5_DEV           g_uart5port /* UART5 is ttyS0 */
+#else
+#  undef CONSOLE_DEV                        /* No console */
+#  if defined(CONFIG_KINETIS_UART0)
+#    define TTYS0_DEV           g_uart0port /* UART0 is ttyS0 */
+#    define UART0_ASSIGNED      1
+#  elif defined(CONFIG_KINETIS_UART1)
+#    define TTYS0_DEV           g_uart1port /* UART1 is ttyS0 */
+#    define UART1_ASSIGNED      1
+#  elif defined(CONFIG_KINETIS_UART2)
+#    define TTYS0_DEV           g_uart2port /* UART2 is ttyS0 */
+#    define UART2_ASSIGNED      1
+#  elif defined(CONFIG_KINETIS_UART3)
+#    define TTYS0_DEV           g_uart3port /* UART3 is ttyS0 */
+#    define UART3_ASSIGNED      1
+#  elif defined(CONFIG_KINETIS_UART4)
+#    define TTYS0_DEV           g_uart4port /* UART4 is ttyS0 */
+#    define UART4_ASSIGNED      1
+#  elif defined(CONFIG_KINETIS_UART5)
+#    define TTYS0_DEV           g_uart5port /* UART5 is ttyS0 */
+#    define UART5_ASSIGNED      1
+#  endif
+#endif
+
+/* Pick ttys1.  This could be any of UART0-5 excluding the console UART. */
+
+#if defined(CONFIG_KINETIS_UART0) && !defined(UART0_ASSIGNED)
+#  define TTYS1_DEV           g_uart0port /* UART0 is ttyS1 */
+#  define UART0_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART1) && !defined(UART1_ASSIGNED)
+#  define TTYS1_DEV           g_uart1port /* UART1 is ttyS1 */
+#  define UART1_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART2) && !defined(UART2_ASSIGNED)
+#  define TTYS1_DEV           g_uart2port /* UART2 is ttyS1 */
+#  define UART2_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART3) && !defined(UART3_ASSIGNED)
+#  define TTYS1_DEV           g_uart3port /* UART3 is ttyS1 */
+#  define UART3_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART4) && !defined(UART4_ASSIGNED)
+#  define TTYS1_DEV           g_uart4port /* UART4 is ttyS1 */
+#  define UART4_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART5) && !defined(UART5_ASSIGNED)
+#  define TTYS1_DEV           g_uart5port /* UART5 is ttyS1 */
+#  define UART5_ASSIGNED      1
+#endif
+
+/* Pick ttys2.  This could be one of UART1-5. It can't be UART0 because that
+ * was either assigned as ttyS0 or ttys1.  One of UART 1-5 could be the
+ * console.
+ */
+
+#if defined(CONFIG_KINETIS_UART1) && !defined(UART1_ASSIGNED)
+#  define TTYS2_DEV           g_uart1port /* UART1 is ttyS2 */
+#  define UART1_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART2) && !defined(UART2_ASSIGNED)
+#  define TTYS2_DEV           g_uart2port /* UART2 is ttyS2 */
+#  define UART2_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART3) && !defined(UART3_ASSIGNED)
+#  define TTYS2_DEV           g_uart3port /* UART3 is ttyS2 */
+#  define UART3_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART4) && !defined(UART4_ASSIGNED)
+#  define TTYS2_DEV           g_uart4port /* UART4 is ttyS2 */
+#  define UART4_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART5) && !defined(UART5_ASSIGNED)
+#  define TTYS2_DEV           g_uart5port /* UART5 is ttyS2 */
+#  define UART5_ASSIGNED      1
+#endif
+
+/* Pick ttys3. This could be one of UART2-5. It can't be UART0-1 because
+ * those have already been assigned to ttsyS0, 1, or 2.  One of
+ * UART 2-5 could be the console.
+ */
+
+#if defined(CONFIG_KINETIS_UART2) && !defined(UART2_ASSIGNED)
+#  define TTYS3_DEV           g_uart2port /* UART2 is ttyS3 */
+#  define UART2_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART3) && !defined(UART3_ASSIGNED)
+#  define TTYS3_DEV           g_uart3port /* UART3 is ttyS3 */
+#  define UART3_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART4) && !defined(UART4_ASSIGNED)
+#  define TTYS3_DEV           g_uart4port /* UART4 is ttyS3 */
+#  define UART4_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART5) && !defined(UART5_ASSIGNED)
+#  define TTYS3_DEV           g_uart5port /* UART5 is ttyS3 */
+#  define UART5_ASSIGNED      1
+#endif
+
+/* Pick ttys4. This could be one of UART3-5. It can't be UART0-2 because
+ * those have already been assigned to ttsyS0, 1, 2 or 3.  One of
+ * UART 3-5 could be the console.
+ */
+
+#if defined(CONFIG_KINETIS_UART3) && !defined(UART3_ASSIGNED)
+#  define TTYS4_DEV           g_uart3port /* UART3 is ttyS4 */
+#  define UART3_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART4) && !defined(UART4_ASSIGNED)
+#  define TTYS4_DEV           g_uart4port /* UART4 is ttyS4 */
+#  define UART4_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART5) && !defined(UART5_ASSIGNED)
+#  define TTYS4_DEV           g_uart5port /* UART5 is ttyS4 */
+#  define UART5_ASSIGNED      1
+#endif
+
+/* Pick ttys5. This could be one of UART4-5. It can't be UART0-3 because
+ * those have already been assigned to ttsyS0, 1, 2, 3 or 4.  One of
+ * UART 4-5 could be the console.
+ */
+
+#if defined(CONFIG_KINETIS_UART4) && !defined(UART4_ASSIGNED)
+#  define TTYS5_DEV           g_uart4port /* UART4 is ttyS5 */
+#  define UART4_ASSIGNED      1
+#elif defined(CONFIG_KINETIS_UART5) && !defined(UART5_ASSIGNED)
+#  define TTYS5_DEV           g_uart5port /* UART5 is ttyS5 */
+#  define UART5_ASSIGNED      1
+#endif
+
+/* These values describe the set of enabled interrupts */
+
+#define IE_RX    (1 << 0)
+#define IE_TX    (1 << 1)
+
+#define RX_ENABLED(im)    (((im) & IE_RX) != 0)
+#define TX_ENABLED(im)    (((im) & IE_TX) != 0)
+
+#define ENABLE_RX(im)     do { (im) |= IE_RX; } while (0)
+#define ENABLE_TX(im)     do { (im) |= IE_TX; } while (0)
+
+#define DISABLE_RX(im)    do { (im) &= ~IE_RX; } while (0)
+#define DISABLE_TX(im)    do { (im) &= ~IE_TX; } while (0)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct up_dev_s
+{
+  uintptr_t uartbase;  /* Base address of UART registers */
+  uint32_t  baud;      /* Configured baud */
+  uint32_t  clock;     /* Clocking frequency of the UART module */
+#ifdef CONFIG_DEBUG
+  uint8_t   irqe;      /* Error IRQ associated with this UART (for enable) */
+#endif
+  uint8_t   irqs;      /* Status IRQ associated with this UART (for enable) */
+  uint8_t   irqprio;   /* Interrupt priority */
+  uint8_t   ie;        /* Interrupts enabled */
+  uint8_t   parity;    /* 0=none, 1=odd, 2=even */
+  uint8_t   bits;      /* Number of bits (8 or 9) */
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int  up_setup(struct uart_dev_s *dev);
+static void up_shutdown(struct uart_dev_s *dev);
+static int  up_attach(struct uart_dev_s *dev);
+static void up_detach(struct uart_dev_s *dev);
+#ifdef CONFIG_DEBUG
+static int  up_interrupte(int irq, void *context);
+#endif
+static int  up_interrupts(int irq, void *context);
+static int  up_ioctl(struct file *filep, int cmd, unsigned long arg);
+static int  up_receive(struct uart_dev_s *dev, uint32_t *status);
+static void up_rxint(struct uart_dev_s *dev, bool enable);
+static bool up_rxavailable(struct uart_dev_s *dev);
+static void up_send(struct uart_dev_s *dev, int ch);
+static void up_txint(struct uart_dev_s *dev, bool enable);
+static bool up_txready(struct uart_dev_s *dev);
+static bool up_txempty(struct uart_dev_s *dev);
+
+/****************************************************************************
+ * Private Variables
+ ****************************************************************************/
+
+struct uart_ops_s g_uart_ops =
+{
+  .setup          = up_setup,
+  .shutdown       = up_shutdown,
+  .attach         = up_attach,
+  .detach         = up_detach,
+  .ioctl          = up_ioctl,
+  .receive        = up_receive,
+  .rxint          = up_rxint,
+  .rxavailable    = up_rxavailable,
+  .send           = up_send,
+  .txint          = up_txint,
+  .txready        = up_txready,
+  .txempty        = up_txempty,
+};
+
+/* I/O buffers */
+
+#ifdef CONFIG_KINETIS_UART0
+static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE];
+static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE];
+#endif
+#ifdef CONFIG_KINETIS_UART1
+static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
+static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
+#endif
+#ifdef CONFIG_KINETIS_UART2
+static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
+static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
+#endif
+#ifdef CONFIG_KINETIS_UART2
+static char g_uart3rxbuffer[CONFIG_UART3_RXBUFSIZE];
+static char g_uart3txbuffer[CONFIG_UART3_TXBUFSIZE];
+#endif
+#ifdef CONFIG_KINETIS_UART2
+static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE];
+static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE];
+#endif
+#ifdef CONFIG_KINETIS_UART2
+static char g_uart5rxbuffer[CONFIG_UART5_RXBUFSIZE];
+static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE];
+#endif
+
+/* This describes the state of the Kinetis UART0 port. */
+
+#ifdef CONFIG_KINETIS_UART0
+static struct up_dev_s g_uart0priv =
+{
+  .uartbase       = KINETIS_UART0_BASE,
+  .clock          = BOARD_CORECLK_FREQ,
+  .baud           = CONFIG_UART0_BAUD,
+#ifdef CONFIG_DEBUG
+  .irqe           = KINETIS_IRQ_UART0E,
+#endif
+  .irqs           = KINETIS_IRQ_UART0S,
+  .irqprio        = CONFIG_KINETIS_UART0PRIO,
+  .parity         = CONFIG_UART0_PARITY,
+  .bits           = CONFIG_UART0_BITS,
+};
+
+static uart_dev_t g_uart0port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART0_RXBUFSIZE,
+    .buffer = g_uart0rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART0_TXBUFSIZE,
+    .buffer = g_uart0txbuffer,
+   },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart0priv,
+};
+#endif
+
+/* This describes the state of the Kinetis UART1 port. */
+
+#ifdef CONFIG_KINETIS_UART1
+static struct up_dev_s g_uart1priv =
+{
+  .uartbase       = KINETIS_UART1_BASE,
+  .clock          = BOARD_CORECLK_FREQ,
+  .baud           = CONFIG_UART1_BAUD,
+#ifdef CONFIG_DEBUG
+  .irqe           = KINETIS_IRQ_UART1E,
+#endif
+  .irqs           = KINETIS_IRQ_UART1S,
+  .irqprio        = CONFIG_KINETIS_UART1PRIO,
+  .parity         = CONFIG_UART1_PARITY,
+  .bits           = CONFIG_UART1_BITS,
+};
+
+static uart_dev_t g_uart1port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART1_RXBUFSIZE,
+    .buffer = g_uart1rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART1_TXBUFSIZE,
+    .buffer = g_uart1txbuffer,
+   },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart1priv,
+};
+#endif
+
+/* This describes the state of the Kinetis UART2 port. */
+
+#ifdef CONFIG_KINETIS_UART2
+static struct up_dev_s g_uart2priv =
+{
+  .uartbase       = KINETIS_UART2_BASE,
+  .clock          = BOARD_BUS_FREQ,
+  .baud           = CONFIG_UART2_BAUD,
+#ifdef CONFIG_DEBUG
+  .irqe           = KINETIS_IRQ_UART2E,
+#endif
+  .irqs           = KINETIS_IRQ_UART2S,
+  .irqprio        = CONFIG_KINETIS_UART2PRIO,
+  .parity         = CONFIG_UART2_PARITY,
+  .bits           = CONFIG_UART2_BITS,
+};
+
+static uart_dev_t g_uart2port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART2_RXBUFSIZE,
+    .buffer = g_uart2rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART2_TXBUFSIZE,
+    .buffer = g_uart2txbuffer,
+   },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart2priv,
+};
+#endif
+
+/* This describes the state of the Kinetis UART3 port. */
+
+#ifdef CONFIG_KINETIS_UART3
+static struct up_dev_s g_uart3priv =
+{
+  .uartbase       = KINETIS_UART3_BASE,
+  .clock          = BOARD_BUS_FREQ,
+  .baud           = CONFIG_UART3_BAUD,
+#ifdef CONFIG_DEBUG
+  .irqe           = KINETIS_IRQ_UART3E,
+#endif
+  .irqs           = KINETIS_IRQ_UART3S,
+  .irqprio        = CONFIG_KINETIS_UART3PRIO,
+  .parity         = CONFIG_UART3_PARITY,
+  .bits           = CONFIG_UART3_BITS,
+};
+
+static uart_dev_t g_uart3port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART3_RXBUFSIZE,
+    .buffer = g_uart3rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART3_TXBUFSIZE,
+    .buffer = g_uart3txbuffer,
+   },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart3priv,
+};
+#endif
+
+/* This describes the state of the Kinetis UART4 port. */
+
+#ifdef CONFIG_KINETIS_UART4
+static struct up_dev_s g_uart4priv =
+{
+  .uartbase       = KINETIS_UART4_BASE,
+  .clock          = BOARD_BUS_FREQ,
+  .baud           = CONFIG_UART4_BAUD,
+#ifdef CONFIG_DEBUG
+  .irqe           = KINETIS_IRQ_UART4E,
+#endif
+  .irqs           = KINETIS_IRQ_UART4S,
+  .irqprio        = CONFIG_KINETIS_UART4PRIO,
+  .parity         = CONFIG_UART4_PARITY,
+  .bits           = CONFIG_UART4_BITS,
+};
+
+static uart_dev_t g_uart4port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART4_RXBUFSIZE,
+    .buffer = g_uart4rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART4_TXBUFSIZE,
+    .buffer = g_uart4txbuffer,
+   },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart4priv,
+};
+#endif
+
+/* This describes the state of the Kinetis UART5 port. */
+
+#ifdef CONFIG_KINETIS_UART5
+static struct up_dev_s g_uart5priv =
+{
+  .uartbase       = KINETIS_UART5_BASE,
+  .clock          = BOARD_BUS_FREQ,
+  .baud           = CONFIG_UART5_BAUD,
+#ifdef CONFIG_DEBUG
+  .irqe           = KINETIS_IRQ_UART5E,
+#endif
+  .irqs           = KINETIS_IRQ_UART5S,
+  .irqprio        = CONFIG_KINETIS_UART5PRIO,
+  .parity         = CONFIG_UART5_PARITY,
+  .bits           = CONFIG_UART5_BITS,
+};
+
+static uart_dev_t g_uart5port =
+{
+  .recv     =
+  {
+    .size   = CONFIG_UART5_RXBUFSIZE,
+    .buffer = g_uart5rxbuffer,
+  },
+  .xmit     =
+  {
+    .size   = CONFIG_UART5_TXBUFSIZE,
+    .buffer = g_uart5txbuffer,
+   },
+  .ops      = &g_uart_ops,
+  .priv     = &g_uart5priv,
+};
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_serialin
+ ****************************************************************************/
+
+static inline uint8_t up_serialin(struct up_dev_s *priv, int offset)
+{
+  return getreg8(priv->uartbase + offset);
+}
+
+/****************************************************************************
+ * Name: up_serialout
+ ****************************************************************************/
+
+static inline void up_serialout(struct up_dev_s *priv, int offset, uint8_t value)
+{
+  putreg8(value, priv->uartbase + offset);
+}
+
+/****************************************************************************
+ * Name: up_restoreuartint
+ ****************************************************************************/
+
+static void up_restoreuartint(struct up_dev_s *priv, uint8_t im)
+{
+  irqstate_t flags;
+
+  /* Re-enable/re-disable interrupts corresponding to the state of bits in im */
+
+  flags = irqsave();
+#warning "Missing logic"
+  irqrestore(flags);
+}
+
+/****************************************************************************
+ * Name: up_disableuartint
+ ****************************************************************************/
+
+static void up_disableuartint(struct up_dev_s *priv, uint8_t *im)
+{
+  irqstate_t flags;
+
+  flags = irqsave();
+  if (im)
+   {
+     *im = priv->im;
+   }
+  up_restoreint(priv, 0);
+  irqrestore(flags);
+}
+
+/****************************************************************************
+ * Name: up_setup
+ *
+ * Description:
+ *   Configure the UART baud, bits, parity, etc. This method is called the
+ *   first time that the serial port is opened.
+ *
+ ****************************************************************************/
+
+static int up_setup(struct uart_dev_s *dev)
+{
+#ifndef CONFIG_SUPPRESS_UART_CONFIG
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+  /* Configure the UART as an RS-232 UART */
+
+  uart_configure(priv->uartbase, priv->baud, priv->clock, priv->parity,
+                 priv->bits);
+#endif
+
+  /* Set up the interrupt priority */
+
+  up_prioritize_irq(priv->irqs, priv->irqprio);
+#ifdef CONFIG_DEBUG
+  up_prioritize_irq(priv->irqe, priv->irqprio);
+#endif
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_shutdown
+ *
+ * Description:
+ *   Disable the UART.  This method is called when the serial
+ *   port is closed
+ *
+ ****************************************************************************/
+
+static void up_shutdown(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+  /* Disable interrupts */
+
+  up_disableuartint(priv, NULL);
+
+  /* Reset hardware and disable Rx and Tx */
+
+  uart_reset(priv->uartbase);
+}
+
+/****************************************************************************
+ * Name: up_attach
+ *
+ * Description:
+ *   Configure the UART to operation in interrupt driven mode.  This method is
+ *   called when the serial port is opened.  Normally, this is just after the
+ *   the setup() method is called, however, the serial console may operate in
+ *   a non-interrupt driven mode during the boot phase.
+ *
+ *   RX and TX interrupts are not enabled when by the attach method (unless the
+ *   hardware supports multiple levels of interrupt enabling).  The RX and TX
+ *   interrupts are not enabled until the txint() and rxint() methods are called.
+ *
+ ****************************************************************************/
+
+static int up_attach(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+  int ret;
+
+  /* Attach the IRQ(s) */
+
+  ret = irq_attach(priv->irqs, up_interrupts);
+#ifdef CONFIG_DEBUG
+  if (ret == OK)
+    {
+      ret = irq_attach(priv->irqe, up_interrupte);
+    }
+#endif
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: up_detach
+ *
+ * Description:
+ *   Detach UART interrupts.  This method is called when the serial port is
+ *   closed normally just before the shutdown method is called.  The exception
+ *   is the serial console which is never shutdown.
+ *
+ ****************************************************************************/
+
+static void up_detach(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+  
+  /* Disable interrupts */
+
+  up_disableuartint(priv, NULL);
+
+  /* Detach from the interrupt(s) */
+
+  irq_detach(priv->irqs);
+#ifdef CONFIG_DEBUG
+  irq_detach(priv->irqe);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_interrupte
+ *
+ * Description:
+ *   This is the UART error interrupt handler.  It will be invoked when an
+ *   interrupt received on the 'irq'
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_DEBUG
+static int up_interrupte(int irq, void *context)
+{
+  struct uart_dev_s *dev = NULL;
+  struct up_dev_s   *priv;
+
+#ifdef CONFIG_KINETIS_UART0
+  if (g_uart0priv.irq == irqe)
+    {
+      dev = &g_uart0port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART1
+  if (g_uart1priv.irq == irqe)
+    {
+      dev = &g_uart1port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART2
+  if (g_uart2priv.irq == irqe)
+    {
+      dev = &g_uart2port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART3
+  if (g_uart3priv.irq == irqe)
+    {
+      dev = &g_uart1port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART4
+  if (g_uart4priv.irq == irqe)
+    {
+      dev = &g_uart1port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART5
+  if (g_uart5priv.irq == irqe)
+    {
+      dev = &g_uart1port;
+    }
+  else
+#endif
+    {
+      PANIC(OSERR_INTERNAL);
+    }
+  priv = (struct up_dev_s*)dev->priv;
+  DEBUGASSERT(priv);
+
+  /* Handle error interrupts.  */
+#warning "Missing logic"
+
+  /* Clear the pending error interrupt */
+
+  up_clrpend_irq(priv->irqe); // Necessary?
+
+  return OK;
+}
+#endif
+
+/****************************************************************************
+ * Name: up_interrupts
+ *
+ * Description:
+ *   This is the UART status interrupt handler.  It will be invoked when an
+ *   interrupt received on the 'irq'  It should call uart_transmitchars or
+ *   uart_receivechar to perform the appropriate data transfers.  The
+ *   interrupt handling logic must be able to map the 'irq' number into the
+ *   approprite uart_dev_s structure in order to call these functions.
+ *
+ ****************************************************************************/
+
+static int up_interrupts(int irq, void *context)
+{
+  struct uart_dev_s *dev = NULL;
+  struct up_dev_s   *priv;
+  int                passes;
+  bool               handled;
+
+#ifdef CONFIG_KINETIS_UART0
+  if (g_uart0priv.irq == irqe)
+    {
+      dev = &g_uart0port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART1
+  if (g_uart1priv.irq == irqs)
+    {
+      dev = &g_uart1port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART2
+  if (g_uart2priv.irq == irqs)
+    {
+      dev = &g_uart2port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART3
+  if (g_uart3priv.irq == irqs)
+    {
+      dev = &g_uart1port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART4
+  if (g_uart4priv.irq == irqs)
+    {
+      dev = &g_uart1port;
+    }
+  else
+#endif
+#ifdef CONFIG_KINETIS_UART5
+  if (g_uart5priv.irq == irqs)
+    {
+      dev = &g_uart1port;
+    }
+  else
+#endif
+    {
+      PANIC(OSERR_INTERNAL);
+    }
+  priv = (struct up_dev_s*)dev->priv;
+  DEBUGASSERT(priv);
+
+  /* Loop until there are no characters to be transferred or,
+   * until we have been looping for a long time.
+   */
+
+  handled = true;
+  for (passes = 0; passes < 256 && handled; passes++)
+    {
+      handled = false;
+
+      /* Check for a pending status interrupt */
+
+      if (up_pending_irq(priv->irqs))
+        {
+          /* Clear the pending status interrupt */
+
+          up_clrpend_irq(priv->irqs); // Necessary?
+
+          /* Handle incoming, receive bytes */
+
+#warning "Missing logic"
+            {
+              /* Process incoming bytes */
+
+              uart_recvchars(dev);
+              handled = true;
+            }
+
+          /* Handle outgoing, transmit bytes */
+#warning "Missing logic"
+            {
+              /* Process outgoing bytes */
+
+              uart_xmitchars(dev);
+              handled = true;
+            }
+        }
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: up_ioctl
+ *
+ * Description:
+ *   All ioctl calls will be routed through this method
+ *
+ ****************************************************************************/
+
+static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
+{
+#if 0 /* Reserved for future growth */
+  struct inode      *inode;
+  struct uart_dev_s *dev;
+  struct up_dev_s   *priv;
+  int                ret = OK;
+
+  DEBUGASSERT(filep, filep->f_inode);
+  inode = filep->f_inode;
+  dev   = inode->i_private;
+
+  DEBUGASSERT(dev, dev->priv)
+  priv = (struct up_dev_s*)dev->priv;
+
+  switch (cmd)
+    {
+    case xxx: /* Add commands here */
+      break;
+
+    default:
+      ret = -ENOTTY;
+      break;
+    }
+
+  return ret;
+#else
+  return -ENOTTY;
+#endif
+}
+
+/****************************************************************************
+ * Name: up_receive
+ *
+ * Description:
+ *   Called (usually) from the interrupt level to receive one
+ *   character from the UART.  Error bits associated with the
+ *   receipt are provided in the return 'status'.
+ *
+ ****************************************************************************/
+
+static int up_receive(struct uart_dev_s *dev, uint32_t *status)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+  /* Return status information */
+
+  if (status)
+    {
+      *status = 0; /* We are not yet tracking serial errors */
+    }
+
+  /* Then return the actual received byte */
+
+  return (int)up_serialin(priv, KINETIS_UART_D_OFFSET);
+}
+
+/****************************************************************************
+ * Name: up_rxint
+ *
+ * Description:
+ *   Call to enable or disable RX interrupts
+ *
+ ****************************************************************************/
+
+static void up_rxint(struct uart_dev_s *dev, bool enable)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+  irqstate_t flags;
+  uint8_t im;
+
+  flags = irqsave();
+  im = priv->im;
+  if (enable)
+    {
+      /* Receive an interrupt when their is anything in the Rx data register (or an Rx
+       * timeout occurs).
+       */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+#ifdef CONFIG_DEBUG
+      up_enable_irq(priv->irqe);
+#endif
+      up_enable_irq(priv->irqs);
+      ENABLE_RX(im);
+#endif
+    }
+  else
+    {
+#ifdef CONFIG_DEBUG
+      up_disable_irq(priv->irqe);
+#endif
+      up_disable_irq(priv->irqs);
+      DISABLE_RX(im);
+    }
+
+  priv->im = im;
+  irqrestore(flags);
+}
+
+/****************************************************************************
+ * Name: up_rxavailable
+ *
+ * Description:
+ *   Return true if the receive register is not empty
+ *
+ ****************************************************************************/
+
+static bool up_rxavailable(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+  /* Return true if the receive data register is full */
+
+  return (up_serialin(priv, KINETIS_UART_S1_OFFSET) & UART_S1_RDRF) != 0;
+}
+
+/****************************************************************************
+ * Name: up_send
+ *
+ * Description:
+ *   This method will send one byte on the UART.
+ *
+ ****************************************************************************/
+
+static void up_send(struct uart_dev_s *dev, int ch)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+  up_serialout(priv, KINETIS_UART_D_OFFSET, (uint8_t)ch);
+}
+
+/****************************************************************************
+ * Name: up_txint
+ *
+ * Description:
+ *   Call to enable or disable TX interrupts
+ *
+ ****************************************************************************/
+
+static void up_txint(struct uart_dev_s *dev, bool enable)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+  irqstate_t flags;
+  uint8_t im;
+
+  flags = irqsave();
+  im = priv->im;
+  if (enable)
+    {
+      /* Enable the TX interrupt */
+
+#ifndef CONFIG_SUPPRESS_SERIAL_INTS
+      ENABLE_TX(im);
+
+      /* Fake a TX interrupt here by just calling uart_xmitchars() with
+       * interrupts disabled (note this may recurse).
+       */
+
+      uart_xmitchars(dev);
+#endif
+    }
+  else
+    {
+      /* Disable the TX interrupt */
+
+      DISABLE_TX(im);
+    }
+
+  priv->im = im;
+  irqrestore(flags);
+}
+
+/****************************************************************************
+ * Name: up_txready
+ *
+ * Description:
+ *   Return true if the tranmsit data register is empty
+ *
+ ****************************************************************************/
+
+static bool up_txready(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+  /* Return true if the transmit data register is "empty."  This state
+   * depends on the TX watermark setting and does not mean that the transmit
+   * buffer is really empty.
+   */
+
+  return (up_serialin(priv, KINETIS_UART_S1_OFFSET) & UART_S1_TDRE) != 0;
+}
+
+/****************************************************************************
+ * Name: up_txempty
+ *
+ * Description:
+ *   Return true if the tranmsit data register is empty
+ *
+ ****************************************************************************/
+
+static bool up_txempty(struct uart_dev_s *dev)
+{
+  struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
+
+  /* Return true if the transmit buffer/fifo is "empty." */
+
+  return (up_serialin(priv, KINETIS_UART_SFIFO_OFFSET) & UART_SFIFO_TXEMPT) != 0;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_earlyserialinit
+ *
+ * Description:
+ *   Performs the low level UART initialization early in debug so that the
+ *   serial console will be available during bootup.  This must be called
+ *   before up_serialinit.  NOTE:  This function depends on GPIO pin
+ *   configuration performed in up_consoleinit() and main clock iniialization
+ *   performed in up_clkinitialize().
+ *
+ ****************************************************************************/
+
+void up_earlyserialinit(void)
+{
+  /* Disable interrupts from all UARTS.  The console is enabled in
+   * pic32mx_consoleinit()
+   */
+
+  up_disableuartint(TTYS0_DEV.priv, NULL);
+#ifdef TTYS1_DEV
+  up_disableuartint(TTYS1_DEV.priv, NULL);
+#endif
+#ifdef TTYS2_DEV
+  up_disableuartint(TTYS2_DEV.priv, NULL);
+#endif
+#ifdef TTYS3_DEV
+  up_disableuartint(TTYS3_DEV.priv, NULL);
+#endif
+#ifdef TTYS4_DEV
+  up_disableuartint(TTYS4_DEV.priv, NULL);
+#endif
+#ifdef TTYS5_DEV
+  up_disableuartint(TTYS5_DEV.priv, NULL);
+#endif
+
+  /* Configuration whichever one is the console */
+
+#ifdef HAVE_SERIAL_CONSOLE
+  CONSOLE_DEV.isconsole = true;
+  up_setup(&CONSOLE_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_serialinit
+ *
+ * Description:
+ *   Register serial console and serial ports.  This assumes
+ *   that up_earlyserialinit was called previously.
+ *
+ ****************************************************************************/
+
+void up_serialinit(void)
+{
+  /* Register the console */
+
+#ifdef HAVE_SERIAL_CONSOLE
+  (void)uart_register("/dev/console", &CONSOLE_DEV);
+#endif
+
+  /* Register all UARTs */
+
+  (void)uart_register("/dev/ttyS0", &TTYS0_DEV);
+#ifdef TTYS1_DEV
+  (void)uart_register("/dev/ttyS1", &TTYS1_DEV);
+#endif
+#ifdef TTYS2_DEV
+  (void)uart_register("/dev/ttyS2", &TTYS2_DEV);
+#endif
+#ifdef TTYS3_DEV
+  (void)uart_register("/dev/ttyS3", &TTYS3_DEV);
+#endif
+#ifdef TTYS4_DEV
+  (void)uart_register("/dev/ttyS4", &TTYS4_DEV);
+#endif
+#ifdef TTYS5_DEV
+  (void)uart_register("/dev/ttyS5", &TTYS5_DEV);
+#endif
+}
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug  writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
+  uint8_t imr;
+
+  up_disableuartint(priv, &imr);
+
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      up_lowputc('\r');
+    }
+
+  up_lowputc(ch);
+  up_restoreuartint(priv, imr);
+#endif
+  return ch;
+}
+
+#else /* CONFIG_USE_SERIALDRIVER */
+
+/****************************************************************************
+ * Name: up_putc
+ *
+ * Description:
+ *   Provide priority, low-level access to support OS debug writes
+ *
+ ****************************************************************************/
+
+int up_putc(int ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  /* Check for LF */
+
+  if (ch == '\n')
+    {
+      /* Add CR */
+
+      up_lowputc('\r');
+    }
+
+  up_lowputc(ch);
+#endif
+  return ch;
+}
+
+#endif /* CONFIG_USE_SERIALDRIVER */
+
diff --git a/nuttx/arch/arm/src/kinetis/kinetis_timerisr.c b/nuttx/arch/arm/src/kinetis/kinetis_timerisr.c
new file mode 100755
index 000000000..62758ee9c
--- /dev/null
+++ b/nuttx/arch/arm/src/kinetis/kinetis_timerisr.c
@@ -0,0 +1,157 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_timerisr.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <time.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
+#include "nvic.h"
+#include "clock_internal.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "kinetis_internal.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* The desired timer interrupt frequency is provided by the definition
+ * CLK_TCK (see include/time.h).  CLK_TCK defines the desired number of
+ * system clock ticks per second.  That value is a user configurable setting
+ * that defaults to 100 (100 ticks per second = 10 MS interval).
+ *
+ * The Clock Source: The System Tick Timer's clock source is always the core
+ * clock
+ */
+
+#define SYSTICK_RELOAD ((BOARD_CORECLK_FREQ / CLK_TCK) - 1)
+
+/* The size of the reload field is 24 bits.  Verify that the reload value
+ * will fit in the reload register.
+ */
+
+#if SYSTICK_RELOAD > 0x00ffffff
+#  error SYSTICK_RELOAD exceeds the range of the RELOAD register
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Global Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  up_timerisr
+ *
+ * Description:
+ *   The timer ISR will perform a variety of services for various portions
+ *   of the systems.
+ *
+ ****************************************************************************/
+
+int up_timerisr(int irq, uint32_t *regs)
+{
+   /* Process timer interrupt */
+
+   sched_process_timer();
+   return 0;
+}
+
+/****************************************************************************
+ * Function:  up_timerinit
+ *
+ * Description:
+ *   This function is called during start-up to initialize
+ *   the timer interrupt.
+ *
+ ****************************************************************************/
+
+void up_timerinit(void)
+{
+  uint32_t regval;
+
+  /* Set the SysTick interrupt to the default priority */
+
+  regval = getreg32(NVIC_SYSH12_15_PRIORITY);
+  regval &= ~NVIC_SYSH_PRIORITY_PR15_MASK;
+  regval |= (NVIC_SYSH_PRIORITY_DEFAULT << NVIC_SYSH_PRIORITY_PR15_SHIFT);
+  putreg32(regval, NVIC_SYSH12_15_PRIORITY);
+
+  /* Note that is should not be neccesary to set the SYSTICK clock source: 
+   * "The CLKSOURCE bit in SysTick Control and Status register is always set
+   *  to select the core clock."
+   */
+
+#if 0
+  regval = getreg32(NVIC_SYSTICK_CTRL);
+  regval |= NVIC_SYSTICK_CTRL_CLKSOURCE;
+  putreg32(regval, NVIC_SYSTICK_CTRL);
+#endif
+
+  /* Configure SysTick to interrupt at the requested rate */
+
+  putreg32(SYSTICK_RELOAD, NVIC_SYSTICK_RELOAD);
+
+  /* Attach the timer interrupt vector */
+
+  (void)irq_attach(KINETIS_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+
+  /* Enable SysTick interrupts */
+
+  putreg32((NVIC_SYSTICK_CTRL_CLKSOURCE | NVIC_SYSTICK_CTRL_TICKINT |
+            NVIC_SYSTICK_CTRL_ENABLE),
+           NVIC_SYSTICK_CTRL);
+
+  /* And enable the timer interrupt */
+
+  up_enable_irq(KINETIS_IRQ_SYSTICK);
+}
diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c b/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c
index 07ef32e4f..87f027da1 100644
--- a/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c
+++ b/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c
@@ -90,12 +90,12 @@
 #    ifdef CONFIG_PIC32MX_UART2
 #      define TTYS1_DEV     g_uart1port     /* UART2 is ttyS1 */
 #    else
-#      undef  TTYS1_DEV                      /* No ttyS1 */
+#      undef  TTYS1_DEV                     /* No ttyS1 */
 #    endif
 #  elif defined(CONFIG_UART2_SERIAL_CONSOLE)
 #    define CONSOLE_DEV     g_uart1port     /* UART2 is console */
 #    define TTYS0_DEV       g_uart1port     /* UART2 is ttyS0 */
-#    undef  TTYS1_DEV                        /* No ttyS1 */
+#    undef  TTYS1_DEV                       /* No ttyS1 */
 #  else
 #    error "I'm confused... Do we have a serial console or not?"
 #  endif
@@ -108,11 +108,11 @@
 #    ifdef CONFIG_PIC32MX_UART2
 #      define TTYS1_DEV     g_uart1port     /* UART2 is ttyS1 */
 #    else
-#      undef  TTYS1_DEV                      /* No ttyS1 */
+#      undef  TTYS1_DEV                     /* No ttyS1 */
 #    endif
 #  elif defined(CONFIG_PIC32MX_UART2)
 #    define TTYS0_DEV       g_uart1port     /* UART2 is ttyS0 */
-#    undef  TTYS1_DEV                        /* No ttyS1 */
+#    undef  TTYS1_DEV                       /* No ttyS1 */
 #  else
 #    undef  TTYS0_DEV
 #    undef  TTYS0_DEV
@@ -144,7 +144,7 @@ struct up_dev_s
   uint8_t   irq;       /* IRQ associated with this UART (for attachment) */
   uint8_t   irqe;      /* Error IRQ associated with this UART (for enable) */
   uint8_t   irqrx;     /* RX IRQ associated with this UART (for enable) */
-  uint8_t   irqtx;     /* RX IRQ associated with this UART (for enable) */
+  uint8_t   irqtx;     /* TX IRQ associated with this UART (for enable) */
   uint8_t   irqprio;   /* Interrupt priority */
   uint8_t   ie;        /* Interrupts enabled */
   uint8_t   parity;    /* 0=none, 1=odd, 2=even */
@@ -193,8 +193,8 @@ struct uart_ops_s g_uart_ops =
 /* I/O buffers */
 
 #ifdef CONFIG_PIC32MX_UART1
-static char g_uart1rxbuffer[CONFIG_UART2_RXBUFSIZE];
-static char g_uart1txbuffer[CONFIG_UART2_TXBUFSIZE];
+static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
+static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
 #endif
 #ifdef CONFIG_PIC32MX_UART2
 static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
@@ -207,27 +207,27 @@ static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
 static struct up_dev_s g_uart1priv =
 {
   .uartbase       = PIC32MX_UART1_K1BASE,
-  .baud           = CONFIG_UART2_BAUD,
+  .baud           = CONFIG_UART1_BAUD,
   .irq            = PIC32MX_IRQ_U1,
   .irqe           = PIC32MX_IRQSRC_U1E,
   .irqrx          = PIC32MX_IRQSRC_U1RX,
   .irqtx          = PIC32MX_IRQSRC_U1TX,
   .irqprio        = CONFIG_PIC32MX_UART1PRIO,
-  .parity         = CONFIG_UART2_PARITY,
-  .bits           = CONFIG_UART2_BITS,
-  .stopbits2      = CONFIG_UART2_2STOP,
+  .parity         = CONFIG_UART1_PARITY,
+  .bits           = CONFIG_UART1_BITS,
+  .stopbits2      = CONFIG_UART1_2STOP,
 };
 
 static uart_dev_t g_uart1port =
 {
   .recv     =
   {
-    .size   = CONFIG_UART2_RXBUFSIZE,
+    .size   = CONFIG_UART1_RXBUFSIZE,
     .buffer = g_uart1rxbuffer,
   },
   .xmit     =
   {
-    .size   = CONFIG_UART2_TXBUFSIZE,
+    .size   = CONFIG_UART1_TXBUFSIZE,
     .buffer = g_uart1txbuffer,
    },
   .ops      = &g_uart_ops,
@@ -237,7 +237,7 @@ static uart_dev_t g_uart1port =
 
 /* This describes the state of the AVR32 UART2 port. */
 
-#ifdef CONFIG_PIC32MX_UART1
+#ifdef CONFIG_PIC32MX_UART2
 static struct up_dev_s g_uart2priv =
 {
   .uartbase       = PIC32MX_UART2_K1BASE,
@@ -414,7 +414,7 @@ static void up_detach(struct uart_dev_s *dev)
 
   up_disableuartint(priv, NULL);
 
-  /* Dettach from the interrupt */
+  /* Detach from the interrupt */
 
   irq_detach(priv->irq);
 }
@@ -639,17 +639,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
 
   /* Return true is data is available in the receive data buffer */
 
-#define UART_STA_URXDA              (1 << 0)  /* Bit 0: Receive buffer data available */
-#define UART_STA_RIDLE              (1 << 4)  /* Bit 4: Receiver idle */
-#define                (1 << 8)  /* Bit 8: */
-#define               (1 << 9)  /* Bit 9: Transmit buffer full status */
-
-  /* Return TRUE if the Transmit shift register is empty */
-
-  return (up_serialin(priv, PIC32MX_UART_STA_OFFSET) & UART_STA_TRMT) != 0;
-
-#warning "Missing logic"
-  return false;
+  return (up_serialin(priv, PIC32MX_UART_STA_OFFSET) & UART_STA_URXDA) != 0;
 }
 
 /****************************************************************************