Fixes for NuTiny-NUC120 configuration and build

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5666 42af7a65-404d-4744-a932-0658087f49c3

18 files changed, 397 insertions, 200 deletions

diff --git a/nuttx/arch/arm/src/armv6-m/up_assert.c b/nuttx/arch/arm/src/armv6-m/up_assert.c
index dd3eed1e3..f2a18c28b 100644
--- a/nuttx/arch/arm/src/armv6-m/up_assert.c
+++ b/nuttx/arch/arm/src/armv6-m/up_assert.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv6-m/up_assert.c
  *
- *   Copyright (C) 2009-2010, 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/nuttx/arch/arm/src/armv6-m/up_copystate.c b/nuttx/arch/arm/src/armv6-m/up_copystate.c
index b7736fb8f..87df1190a 100644
--- a/nuttx/arch/arm/src/armv6-m/up_copystate.c
+++ b/nuttx/arch/arm/src/armv6-m/up_copystate.c
@@ -70,7 +70,7 @@ void up_copystate(uint32_t *dest, uint32_t *src)
 {
   int i;
 
-  /* In the Cortex-M3 model, the state is copied from the stack to the TCB,
+  /* In the Cortex-M0 model, the state is copied from the stack to the TCB,
    * but only a reference is passed to get the state from the TCB.  So the
    * following check avoids copying the TCB save area onto itself:
    */
diff --git a/nuttx/arch/arm/src/armv6-m/up_exception.S b/nuttx/arch/arm/src/armv6-m/up_exception.S
index ef399b5e7..4bc59126c 100644
--- a/nuttx/arch/arm/src/armv6-m/up_exception.S
+++ b/nuttx/arch/arm/src/armv6-m/up_exception.S
@@ -1,10 +1,13 @@
 /************************************************************************************
  * arch/arm/src/armv6-m/up_exception.S
  *
- *   Copyright (C) 2009-2013 Gregory Nutt. All rights reserved.
- *   Copyright (C) 2012 Michael Smith. All rights reserved.
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
+ * This file was leveraged from the ARMv7-M version which has, in addition:
+ *
+ *   Copyright (C) 2012 Michael Smith. All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
diff --git a/nuttx/arch/arm/src/armv6-m/up_hardfault.c b/nuttx/arch/arm/src/armv6-m/up_hardfault.c
index 48eecb947..afbcda9c2 100644
--- a/nuttx/arch/arm/src/armv6-m/up_hardfault.c
+++ b/nuttx/arch/arm/src/armv6-m/up_hardfault.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv6-m/up_hardfault.c
  *
- *   Copyright (C) 2009, 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -92,7 +92,6 @@ int up_hardfault(int irq, FAR void *context)
 {
 #if defined(CONFIG_DEBUG_HARDFAULT)
   uint32_t *regs = (uint32_t*)context;
-#endif
 
   /* Dump some hard fault info */
 
@@ -100,10 +99,6 @@ int up_hardfault(int irq, FAR void *context)
   hfdbg("  IRQ: %d regs: %p\n", irq, regs);
   hfdbg("  BASEPRI: %08x PRIMASK: %08x IPSR: %08x\n",
         getbasepri(), getprimask(), getipsr());
-  hfdbg("  CFAULTS: %08x HFAULTS: %08x DFAULTS: %08x BFAULTADDR: %08x AFAULTS: %08x\n",
-        getreg32(NVIC_CFAULTS), getreg32(NVIC_HFAULTS),
-        getreg32(NVIC_DFAULTS), getreg32(NVIC_BFAULT_ADDR),
-        getreg32(NVIC_AFAULTS));
   hfdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
         regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
         regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
@@ -112,9 +107,10 @@ int up_hardfault(int irq, FAR void *context)
         regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
   hfdbg("  xPSR: %08x BASEPRI: %08x (saved)\n",
         current_regs[REG_XPSR],  current_regs[REG_BASEPRI]);
+#endif
 
   (void)irqsave();
-  lldbg("PANIC!!! Hard fault: %08x\n", getreg32(NVIC_HFAULTS));
+  lldbg("PANIC!!! Hard fault\n");
   PANIC(OSERR_UNEXPECTEDISR);
   return OK;
 }
diff --git a/nuttx/arch/arm/src/armv6-m/up_initialstate.c b/nuttx/arch/arm/src/armv6-m/up_initialstate.c
index 6b2c98e67..8e5c37e40 100644
--- a/nuttx/arch/arm/src/armv6-m/up_initialstate.c
+++ b/nuttx/arch/arm/src/armv6-m/up_initialstate.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv6-m/up_initialstate.c
  *
- *   Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/nuttx/arch/arm/src/armv6-m/up_memfault.c b/nuttx/arch/arm/src/armv6-m/up_memfault.c
deleted file mode 100644
index d04a9acf8..000000000
--- a/nuttx/arch/arm/src/armv6-m/up_memfault.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/****************************************************************************
- * arch/arm/src/armv6-m/up_memfault.c
- *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
- *   Author: Gregory Nutt <gnutt@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in
- *    the documentation and/or other materials provided with the
- *    distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- *    used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <assert.h>
-#include <debug.h>
-
-#include <arch/irq.h>
-
-#include "up_arch.h"
-#include "os_internal.h"
-#include "nvic.h"
-#include "up_internal.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#undef DEBUG_MEMFAULTS         /* Define to debug memory management faults */
-
-#ifdef DEBUG_MEMFAULTS
-# define mfdbg(format, arg...) lldbg(format, ##arg)
-#else
-# define mfdbg(x...)
-#endif
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: up_memfault
- *
- * Description:
- *   This is Memory Management Fault exception handler.  Normally we get here
- *   when the Cortex M3 MPU is enabled and an MPU fault is detected.  However,
- *   I understand that there are other error conditions that can also generate
- *   memory management faults.
- *
- ****************************************************************************/
-
-int up_memfault(int irq, FAR void *context)
-{
-  /* Dump some memory management fault info */
-
-  (void)irqsave();
-  lldbg("PANIC!!! Memory Management Fault:\n");
-  mfdbg("  IRQ: %d context: %p\n", irq, regs);
-  lldbg("  CFAULTS: %08x MMFAR: %08x\n",
-        getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
-  mfdbg("  R0: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-        regs[REG_R0],  regs[REG_R1],  regs[REG_R2],  regs[REG_R3],
-        regs[REG_R4],  regs[REG_R5],  regs[REG_R6],  regs[REG_R7]);
-  mfdbg("  R8: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-        regs[REG_R8],  regs[REG_R9],  regs[REG_R10], regs[REG_R11],
-        regs[REG_R12], regs[REG_R13], regs[REG_R14], regs[REG_R15]);
-  mfdbg("  PSR=%08x\n", regs[REG_XPSR]);
-
-  PANIC(OSERR_UNEXPECTEDISR);
-  return OK;
-}
diff --git a/nuttx/arch/arm/src/armv6-m/up_reprioritizertr.c b/nuttx/arch/arm/src/armv6-m/up_reprioritizertr.c
index bbe43e8c2..0bc0d4170 100644
--- a/nuttx/arch/arm/src/armv6-m/up_reprioritizertr.c
+++ b/nuttx/arch/arm/src/armv6-m/up_reprioritizertr.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  *  arch/arm/src/armv6-m/up_reprioritizertr.c
  *
- *   Copyright (C) 2007-2009, 2012-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/nuttx/arch/arm/src/armv6-m/up_schedulesigaction.c b/nuttx/arch/arm/src/armv6-m/up_schedulesigaction.c
index 4ebb0ac37..aa85d56f0 100644
--- a/nuttx/arch/arm/src/armv6-m/up_schedulesigaction.c
+++ b/nuttx/arch/arm/src/armv6-m/up_schedulesigaction.c
@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/armv6-m/up_schedulesigaction.c
  *
- *   Copyright (C) 2009-2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
diff --git a/nuttx/arch/arm/src/common/up_internal.h b/nuttx/arch/arm/src/common/up_internal.h
index 611376729..87fad04bd 100644
--- a/nuttx/arch/arm/src/common/up_internal.h
+++ b/nuttx/arch/arm/src/common/up_internal.h
@@ -232,75 +232,79 @@ extern uint32_t _eramfuncs;       /* Copy destination start address in RAM */
 
 /* Low level initialization provided by board-level logic ******************/
 
-extern void up_boot(void);
+void up_boot(void);
 
 /* Context switching */
 
-extern void up_copystate(uint32_t *dest, uint32_t *src);
-extern void up_decodeirq(uint32_t *regs);
-extern int  up_saveusercontext(uint32_t *saveregs);
-extern void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
-extern void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
+void up_copystate(uint32_t *dest, uint32_t *src);
+void up_decodeirq(uint32_t *regs);
+int  up_saveusercontext(uint32_t *saveregs);
+void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
+void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
 
 /* Signal handling **********************************************************/
 
-extern void up_sigdeliver(void);
+void up_sigdeliver(void);
 
 /* Power management *********************************************************/
 
 #ifdef CONFIG_PM
-extern void up_pminitialize(void);
+void up_pminitialize(void);
 #else
 #  define up_pminitialize()
 #endif
 
 #if defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4)
-extern void up_systemreset(void) noreturn_function;
+void up_systemreset(void) noreturn_function;
 #endif
 
 /* Interrupt handling *******************************************************/
 
-extern void up_irqinitialize(void);
-extern void up_maskack_irq(int irq);
+void up_irqinitialize(void);
+void up_maskack_irq(int irq);
 
 #if defined(CONFIG_ARCH_CORTEXM0) || defined(CONFIG_ARCH_CORTEXM3) || \
     defined(CONFIG_ARCH_CORTEXM4)
 
-extern uint32_t *up_doirq(int irq, uint32_t *regs);
-extern int  up_svcall(int irq, FAR void *context);
-extern int  up_hardfault(int irq, FAR void *context);
-extern int  up_memfault(int irq, FAR void *context);
+uint32_t *up_doirq(int irq, uint32_t *regs);
+int  up_svcall(int irq, FAR void *context);
+int  up_hardfault(int irq, FAR void *context);
 
+#  if defined(CONFIG_ARCH_CORTEXM3) || defined(CONFIG_ARCH_CORTEXM4)
+
+int  up_memfault(int irq, FAR void *context);
+
+#  endif /* CONFIG_ARCH_CORTEXM3 || CONFIG_ARCH_CORTEXM4 */
 #else /* CONFIG_ARCH_CORTEXM0 || CONFIG_ARCH_CORTEXM3 || CONFIG_ARCH_CORTEXM4 */
 
-extern void up_doirq(int irq, uint32_t *regs);
+void up_doirq(int irq, uint32_t *regs);
 #ifdef CONFIG_PAGING
-extern void up_pginitialize(void);
-extern uint32_t *up_va2pte(uintptr_t vaddr);
-extern void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr);
+void up_pginitialize(void);
+uint32_t *up_va2pte(uintptr_t vaddr);
+void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr);
 #else /* CONFIG_PAGING */
 # define up_pginitialize()
-extern void up_dataabort(uint32_t *regs);
+void up_dataabort(uint32_t *regs);
 #endif /* CONFIG_PAGING */
-extern void up_prefetchabort(uint32_t *regs);
-extern void up_syscall(uint32_t *regs);
-extern void up_undefinedinsn(uint32_t *regs);
+void up_prefetchabort(uint32_t *regs);
+void up_syscall(uint32_t *regs);
+void up_undefinedinsn(uint32_t *regs);
 
 #endif /* CONFIG_ARCH_CORTEXM3 || CONFIG_ARCH_CORTEXM4 */
 
-extern void up_vectorundefinsn(void);
-extern void up_vectorswi(void);
-extern void up_vectorprefetch(void);
-extern void up_vectordata(void);
-extern void up_vectoraddrexcptn(void);
-extern void up_vectorirq(void);
-extern void up_vectorfiq(void);
+void up_vectorundefinsn(void);
+void up_vectorswi(void);
+void up_vectorprefetch(void);
+void up_vectordata(void);
+void up_vectoraddrexcptn(void);
+void up_vectorirq(void);
+void up_vectorfiq(void);
 
 /* Floating point unit ******************************************************/
 
 #ifdef CONFIG_ARCH_FPU
-extern void up_savefpu(uint32_t *regs);
-extern void up_restorefpu(const uint32_t *regs);
+void up_savefpu(uint32_t *regs);
+void up_restorefpu(const uint32_t *regs);
 #else
 #  define up_savefpu(regs)
 #  define up_restorefpu(regs)
@@ -308,18 +312,18 @@ extern void up_restorefpu(const uint32_t *regs);
 
 /* System timer *************************************************************/
 
-extern void up_timerinit(void);
-extern int  up_timerisr(int irq, uint32_t *regs);
+void up_timerinit(void);
+int  up_timerisr(int irq, uint32_t *regs);
 
 /* Low level serial output **************************************************/
 
-extern void up_lowputc(char ch);
-extern void up_puts(const char *str);
-extern void up_lowputs(const char *str);
+void up_lowputc(char ch);
+void up_puts(const char *str);
+void up_lowputs(const char *str);
 
 #if CONFIG_NFILE_DESCRIPTORS > 0
-extern void up_earlyserialinit(void);
-extern void up_serialinit(void);
+void up_earlyserialinit(void);
+void up_serialinit(void);
 #else
 # define up_earlyserialinit()
 # define up_serialinit()
@@ -328,7 +332,7 @@ extern void up_serialinit(void);
 /* Defined in drivers/lowconsole.c */
 
 #ifdef CONFIG_DEV_LOWCONSOLE
-extern void lowconsole_init(void);
+void lowconsole_init(void);
 #else
 # define lowconsole_init()
 #endif
@@ -336,7 +340,7 @@ extern void lowconsole_init(void);
 /* DMA **********************************************************************/
 
 #ifdef CONFIG_ARCH_DMA
-extern void weak_function up_dmainitialize(void);
+void weak_function up_dmainitialize(void);
 #endif
 
 /* Memory management ********************************************************/
@@ -349,14 +353,14 @@ void up_addregion(void);
 
 /* Watchdog timer ***********************************************************/
 
-extern void up_wdtinit(void);
+void up_wdtinit(void);
 
 /* LED interfaces provided by board-level logic *****************************/
 
 #ifdef CONFIG_ARCH_LEDS
-extern void up_ledinit(void);
-extern void up_ledon(int led);
-extern void up_ledoff(int led);
+void up_ledinit(void);
+void up_ledon(int led);
+void up_ledoff(int led);
 #else
 # define up_ledinit()
 # define up_ledon(led)
@@ -372,7 +376,7 @@ extern void up_ledoff(int led);
  */
 
 #ifdef CONFIG_NET
-extern void up_netinitialize(void);
+void up_netinitialize(void);
 #else
 # define up_netinitialize()
 #endif
@@ -380,8 +384,8 @@ extern void up_netinitialize(void);
 /* USB **********************************************************************/
 
 #ifdef CONFIG_USBDEV
-extern void up_usbinitialize(void);
-extern void up_usbuninitialize(void);
+void up_usbinitialize(void);
+void up_usbuninitialize(void);
 #else
 # define up_usbinitialize()
 # define up_usbuninitialize()
@@ -390,7 +394,7 @@ extern void up_usbuninitialize(void);
 /* Random Number Generator (RNG) ********************************************/
 
 #ifdef CONFIG_DEV_RANDOM
-extern void up_rnginitialize(void);
+void up_rnginitialize(void);
 #endif
 
 /****************************************************************************
@@ -410,9 +414,9 @@ extern void up_rnginitialize(void);
  ****************************************************************************/
 
 #if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_STACK)
-extern size_t up_check_stack(void);
-extern size_t up_check_tcbstack(FAR struct tcb_s);
-extern size_t up_check_tcbstack_remain(FAR struct tcb_s);
+size_t up_check_stack(void);
+size_t up_check_tcbstack(FAR struct tcb_s);
+size_t up_check_tcbstack_remain(FAR struct tcb_s);
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/nuttx/arch/arm/src/nuc1xx/Kconfig b/nuttx/arch/arm/src/nuc1xx/Kconfig
index 50c8e5669..bc590fbe2 100644
--- a/nuttx/arch/arm/src/nuc1xx/Kconfig
+++ b/nuttx/arch/arm/src/nuc1xx/Kconfig
@@ -12,132 +12,340 @@ choice
 
 config ARCH_CHIP_NUC100LC1BN
 	bool "NUC100LC1BN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC100 low density chip: Flash 32K SRAM 4K, LQFP48 package
 
 config ARCH_CHIP_NUC100LD1BN
 	bool "NUC100LD1BN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC100 low density chip: Flash 64K SRAM 4K, LQFP48 package
 
 config ARCH_CHIP_NUC100LD2BN
 	bool "NUC100LD2BN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC100 low density chip: Flash 64K SRAM 8K, LQFP48 package
 
 config ARCH_CHIP_NUC100RC1BN
 	bool "NUC100RC1BN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC100 low density chip: Flash 32K SRAM 4K, LQFP64 package
 
 config ARCH_CHIP_NUC100RD1BN
 	bool "NUC100RD1BN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC100 low density chip: Flash 64K SRAM 4K, LQFP64 package
 
 config ARCH_CHIP_NUC100RD2BN
 	bool "NUC100RD2BN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC100 low density chip: Flash 64K SRAM 8K, LQFP64 package
 
 config ARCH_CHIP_NUC100LD3AN
 	bool "NUC100LD3AN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_MEDIUMDENSITY
 	---help---
 		Nuvoton NUC100 medium density chip: Flash 64K SRAM 16K, LQFP48 package
 
 config ARCH_CHIP_NUC100LE3AN
 	bool "NUC100LE3AN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_MEDIUMDENSITY
 	---help---
 		Nuvoton NUC100 medium density chip: Flash 128K SRAM 16K, LQFP48 package
 
 config ARCH_CHIP_NUC100RD3AN
 	bool "NUC100RD3AN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_MEDIUMDENSITY
+	select NUC_HAVE_UART2
 	---help---
 		Nuvoton NUC100 medium density chip: Flash 64K SRAM 16K, LQFP64 package
 
 config ARCH_CHIP_NUC100RE3AN
 	bool "NUC100RE3AN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_MEDIUMDENSITY
+	select NUC_HAVE_UART2
 	---help---
 		Nuvoton NUC100 medium density chip: Flash 128K SRAM 16K, LQFP64 package
 
 config ARCH_CHIP_NUC100VD2AN
 	bool "NUC100VD2AN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_MEDIUMDENSITY
+	select NUC_HAVE_UART2
 	---help---
 		Nuvoton NUC100 medium density chip: Flash 64K SRAM 8K, LQFP100 package
 
 config ARCH_CHIP_NUC100VD3AN
 	bool "NUC100VD3AN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_MEDIUMDENSITY
+	select NUC_HAVE_UART2
 	---help---
 		Nuvoton NUC100 medium density chip: Flash 64K SRAM 16K, LQFP100 package
 
 config ARCH_CHIP_NUC100VE3AN
 	bool "NUC100VE3AN"
+	select ARCH_FAMILY_NUC100
+	select ARCH_NUC_MEDIUMDENSITY
+	select NUC_HAVE_UART2
 	---help---
 		Nuvoton NUC100 medium density chip: Flash 128K SRAM 8K, LQFP100 package
 
 config ARCH_CHIP_NUC120LC1BN
 	bool "NUC120LC1BN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC120 low density chip: Flash 32K SRAM 4K, LQFP48 package
 
 config ARCH_CHIP_NUC120LD1BN
 	bool "NUC120LD1BN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC120 low density chip: Flash 64K SRAM 4K, LQFP48 package
 
 config ARCH_CHIP_NUC120LD2BN
 	bool "NUC120LD2BN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC120 low density chip: Flash 64K SRAM 8K, LQFP48 package
 
 config ARCH_CHIP_NUC120RC1BN
 	bool "NUC120RC1BN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC120 low density chip: Flash 32K SRAM 4K, LQFP64 package
 
 config ARCH_CHIP_NUC120RD1BN
 	bool "NUC120RD1BN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC120 low density chip: Flash 64K SRAM 4K, LQFP64 package
 
 config ARCH_CHIP_NUC120RD2BN
 	bool "NUC120RD2BN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_LOWDENSITY
 	---help---
 		Nuvoton NUC120 low density chip: Flash 64K SRAM 8K, LQFP64 package
 
 config ARCH_CHIP_NUC120LD3AN
 	bool "NUC120LD3AN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_MEDIUMDENSITY
 	---help---
 		Nuvoton NUC120 medium density chip: Flash 64K SRAM 16K, LQFP48 package
 
 config ARCH_CHIP_NUC120LE3AN
 	bool "NUC120LE3AN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_MEDIUMDENSITY
 	---help---
 		Nuvoton NUC120 medium density chip: Flash 128K SRAM 16K, LQFP48 package
 
 config ARCH_CHIP_NUC120RD3AN
 	bool "NUC120RD3AN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_MEDIUMDENSITY
 	---help---
 		Nuvoton NUC120 medium density chip: Flash 64K SRAM 16K, LQFP64 package
 
 config ARCH_CHIP_NUC120RE3AN
 	bool "NUC120RE3AN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_MEDIUMDENSITY
 	---help---
 		Nuvoton NUC120 medium density chip: Flash 128K SRAM 16K, LQFP64 package
 
 config ARCH_CHIP_NUC120VD2AN
 	bool "NUC120VD2AN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_MEDIUMDENSITY
+	select NUC_HAVE_UART2
 	---help---
 		Nuvoton NUC120 medium density chip: Flash 64K SRAM 8K, LQFP100 package
 
 config ARCH_CHIP_NUC120VD3AN
 	bool "NUC120VD3AN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_MEDIUMDENSITY
+	select NUC_HAVE_UART2
 	---help---
 		Nuvoton NUC120 medium density chip: Flash 64K SRAM 16K, LQFP100 package
 
 config ARCH_CHIP_NUC120VE3AN
 	bool "NUC120VE3AN"
+	select ARCH_FAMILY_NUC120
+	select ARCH_NUC_MEDIUMDENSITY
+	select NUC_HAVE_UART2
 	---help---
 		Nuvoton NUC120 medium density chip: Flash 128K SRAM 16K, LQFP100 package
 
 endchoice
+
+config ARCH_FAMILY_NUC100
+	bool
+
+config ARCH_FAMILY_NUC120
+	bool
+
+config ARCH_NUC_LOWDENSITY
+	bool
+
+config ARCH_NUC_MEDIUMDENSITY
+	bool
+
+config NUC_HAVE_UART2
+	bool
+
+menu "NUC1XX Peripheral Support"
+
+config NUC_PDMA
+	bool "Peripheral DMA"
+	default n
+
+config NUC_FMC
+	bool "Flash memory"
+	default n
+
+config NUC_EBI
+	bool "External bus interface"
+	default n
+
+config NUC_WDT
+	bool "Watchdog timer"
+	default n
+
+config NUC_RTC
+	bool "Real time clock (RTC)"
+	default n
+
+config NUC_TMR0
+	bool "Timer0"
+	default n
+
+config NUC_TMR1
+	bool "Timer1"
+	default n
+
+config NUC_TIMR2
+	bool "Timer2"
+	default n
+
+config NUC_TIMR3
+	bool "Timer3"
+	default n
+
+config NUC_I2C0
+	bool "I2C0 interface"
+	default n
+
+config NUC_I2C1
+	bool "I2C1 interface"
+	default n
+
+config NUC_SPI0
+	bool "SPI0 master/slave"
+	default n
+
+config NUC_SPI1
+	bool "SPI1 master/slave"
+	default n
+
+config NUC_SPI2
+	bool "SPI2 master/slave"
+	default n
+
+config NUC_SPI3
+	bool "SPI3 master/slave"
+	default n
+
+config NUC_PWM0
+	bool "PWM0"
+	default n
+
+config NUC_PWM1
+	bool "PWM1"
+	default n
+
+config NUC_PWM2
+	bool "PWM2"
+	default n
+
+config NUC_PWM3
+	bool "PWM3"
+	default n
+
+config NUC_PWM4
+	bool "PWM4"
+	default n
+
+config NUC_PWM5
+	bool "PWM5"
+	default n
+
+config NUC_PWM6
+	bool "PWM6"
+	default n
+
+config NUC_PWM7
+	bool "PWM7"
+	default n
+
+config NUC_UART0
+	bool "UART0"
+	default y
+	select ARCH_HAVE_UART0
+
+config NUC_UART1
+	bool "UART1"
+	default n
+	select ARCH_HAVE_UART1
+
+config NUC_UART2
+	bool "UART2"
+	default n
+	depends on NUC_HAVE_UART1
+	select ARCH_HAVE_UART2
+
+config NUC_USBD
+	bool "USB 2.0 FS device controller"
+	default n
+	depends on ARCH_FAMILY_NUC120
+
+config NUC_ACMP
+	bool "Analog comparator"
+	default n
+
+config NUC_ADC
+	bool "Analog-digital-converter (ADC)"
+	default n
+
+config NUC_PS2
+	bool "PS/2 interface"
+	default n
+
+config NUC_I2S
+	bool "I2S interface"
+	default n
+
+endmenu
diff --git a/nuttx/arch/arm/src/nuc1xx/Make.defs b/nuttx/arch/arm/src/nuc1xx/Make.defs
index c2361fd70..7ccae77fa 100644
--- a/nuttx/arch/arm/src/nuc1xx/Make.defs
+++ b/nuttx/arch/arm/src/nuc1xx/Make.defs
@@ -41,7 +41,7 @@ CMN_ASRCS += up_switchcontext.S vfork.S
 CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c
 CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
 CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
-CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
+CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
 CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
 CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_systemreset.c
 CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c
diff --git a/nuttx/arch/arm/src/nuc1xx/nuc_config.h b/nuttx/arch/arm/src/nuc1xx/nuc_config.h
index 31436958d..e985c2344 100644
--- a/nuttx/arch/arm/src/nuc1xx/nuc_config.h
+++ b/nuttx/arch/arm/src/nuc1xx/nuc_config.h
@@ -41,6 +41,7 @@
  ************************************************************************************/
 
 #include <nuttx/config.h>
+#include <arch/nuc1xx/chip.h>
 
 /************************************************************************************
  * Pre-processor Definitions
diff --git a/nuttx/arch/arm/src/nuc1xx/nuc_lowputc.c b/nuttx/arch/arm/src/nuc1xx/nuc_lowputc.c
index b383e6fbf..50b9b35f0 100644
--- a/nuttx/arch/arm/src/nuc1xx/nuc_lowputc.c
+++ b/nuttx/arch/arm/src/nuc1xx/nuc_lowputc.c
@@ -52,6 +52,7 @@
 #include "chip/chip/nuc_clk.h"
 #include "chip/chip/nuc_uart.h"
 
+#include "chip/nuc_gcr.h"
 #include "nuc_lowputc.h"
 
 /****************************************************************************
@@ -205,14 +206,14 @@ void nuc_lowsetup(void)
 
   /* Reset the TX FIFO */
 
-  regval = getreg32(NUC_CONSOLE_BASE + NUC_UART_FCR_OFFSET
-  regval |= UART_FCR_TFR
+  regval = getreg32(NUC_CONSOLE_BASE + NUC_UART_FCR_OFFSET);
+  regval |= UART_FCR_TFR;
   putreg32(regval, NUC_CONSOLE_BASE + NUC_UART_FCR_OFFSET);
 
   /* Reset the RX FIFO */
 
-  regval = getreg32(NUC_CONSOLE_BASE + NUC_UART_FCR_OFFSET
-  regval |= UART_FCR_RFR
+  regval = getreg32(NUC_CONSOLE_BASE + NUC_UART_FCR_OFFSET);
+  regval |= UART_FCR_RFR;
   putreg32(regval, NUC_CONSOLE_BASE + NUC_UART_FCR_OFFSET);
 
   /* Set Rx Trigger Level */
@@ -256,13 +257,34 @@ void nuc_lowsetup(void)
 
   /* Set the baud */
 
-  nuc_setbaud(CONSOLE_BASE, CONSOLE_BAUD);
+  nuc_setbaud(NUC_CONSOLE_BASE, NUC_CONSOLE_BAUD);
 
 #endif /* HAVE_SERIAL_CONSOLE */
 #endif /* HAVE_UART */
 }
 
 /****************************************************************************
+ * Name: nuc_lowputc
+ *
+ * Description:
+ *   Output one character to the UART using a simple polling method.
+ *
+ *****************************************************************************/
+
+void nuc_lowputc(uint32_t ch)
+{
+#ifdef HAVE_SERIAL_CONSOLE
+  /* Wait for the TX FIFO to be empty (excessive!) */
+
+  while ((getreg32(NUC_CONSOLE_BASE + NUC_UART_FSR_OFFSET) & UART_FSR_TX_EMPTY) != 0);
+
+  /* Then write the character to to the TX FIFO */
+
+  putreg32(ch, NUC_CONSOLE_BASE + NUC_UART_THR_OFFSET);
+#endif /* HAVE_SERIAL_CONSOLE */
+}
+
+/****************************************************************************
  * Name: nuc_setbaud
  *
  * Description:
@@ -317,7 +339,7 @@ void nuc_setbaud(uintptr_t base, uint32_t baud)
    
           for (divx = 8; divx <16; divx++)
             {
-              brd = (clksperbit % (divx+1))
+              brd = (clksperbit % (divx+1));
               if (brd < 3)
                 {
                   regval &= ~UART_BAUD_DIVIDER_X_MASK;
@@ -331,7 +353,7 @@ void nuc_setbaud(uintptr_t base, uint32_t baud)
     }
 
   regval &= ~UART_BAUD_BRD_MASK;
-  regval &= define UART_BAUD_BRD(brd);
+  regval |= UART_BAUD_BRD(brd);
   putreg32(regval, base + NUC_UART_BAUD_OFFSET);
 
 }
diff --git a/nuttx/arch/arm/src/nuc1xx/nuc_lowputc.h b/nuttx/arch/arm/src/nuc1xx/nuc_lowputc.h
index 92232b395..e9a4be12a 100644
--- a/nuttx/arch/arm/src/nuc1xx/nuc_lowputc.h
+++ b/nuttx/arch/arm/src/nuc1xx/nuc_lowputc.h
@@ -41,6 +41,7 @@
  ************************************************************************************/
 
 #include <nuttx/config.h>
+#include "nuc_config.h"
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -97,7 +98,19 @@ void nuc_lowsetup(void);
  *****************************************************************************/
 
 #ifdef HAVE_UART
-void nuc_setbaud(uintptr_t base, uint32_t baud)
+void nuc_setbaud(uintptr_t base, uint32_t baud);
+#endif
+
+/****************************************************************************
+ * Name: nuc_lowputc
+ *
+ * Description:
+ *   Output one character to the UART using a simple polling method.
+ *
+ *****************************************************************************/
+
+#ifdef HAVE_SERIAL_CONSOLE
+void nuc_lowputc(uint32_t ch);
 #endif
 
 #undef EXTERN
diff --git a/nuttx/arch/arm/src/nuc1xx/nuc_serial.c b/nuttx/arch/arm/src/nuc1xx/nuc_serial.c
index b0b6aa67f..060d274ef 100644
--- a/nuttx/arch/arm/src/nuc1xx/nuc_serial.c
+++ b/nuttx/arch/arm/src/nuc1xx/nuc_serial.c
@@ -65,6 +65,7 @@
 
 #include "chip.h"
 #include "chip/nuc_uart.h"
+#include "nuc_lowputc.h"
 #include "nuc_serial.h"
 
 /****************************************************************************
@@ -935,10 +936,10 @@ int up_putc(int ch)
     {
       /* Add CR */
 
-      up_lowputc('\r');
+      nuc_lowputc((uint32_t)'\r');
     }
 
-  up_lowputc(ch);
+  nuc_lowputc((uint32_t)ch);
 #ifdef HAVE_CONSOLE
   up_restoreuartint(priv, ier);
 #endif
@@ -965,10 +966,10 @@ int up_putc(int ch)
     {
       /* Add CR */
 
-      up_lowputc('\r');
+      nuc_lowputc((uint32_t)'\r');
     }
 
-  up_lowputc(ch);
+  nuc_lowputc((uint32_t)ch);
 #endif
   return ch;
 }
diff --git a/nuttx/arch/arm/src/nuc1xx/nuc_start.c b/nuttx/arch/arm/src/nuc1xx/nuc_start.c
index cd410db27..67c06c7a5 100644
--- a/nuttx/arch/arm/src/nuc1xx/nuc_start.c
+++ b/nuttx/arch/arm/src/nuc1xx/nuc_start.c
@@ -50,6 +50,7 @@
 #include "up_arch.h"
 #include "up_internal.h"
 
+#include "nuc_config.h"
 #include "nuc_lowputc.h"
 #include "nuc_clockconfig.h"
 
@@ -90,8 +91,8 @@ const uint32_t g_heapbase = HEAP_BASE;
  *
  ****************************************************************************/
 
-#ifdef CONFIG_DEBUG
-#  define showprogress(c) up_lowputc(c)
+#if defined(CONFIG_DEBUG) && defined(HAVE_SERIAL_CONSOLE)
+#  define showprogress(c) nuc_lowputc((uint32_t)c)
 #else
 #  define showprogress(c)
 #endif
diff --git a/nuttx/configs/nutiny-nuc120/README.txt b/nuttx/configs/nutiny-nuc120/README.txt
index 3f1e84df9..ac43cbb6b 100644
--- a/nuttx/configs/nutiny-nuc120/README.txt
+++ b/nuttx/configs/nutiny-nuc120/README.txt
@@ -193,13 +193,17 @@ NuTiny-specific Configuration Options
 
     CONFIG_NUC_WDT     Watchdog timer
     CONFIG_NUC_RTC     Real time clock (RTC)
-    CONFIG_NUC_TMR01   Timer0/Timer1
+    CONFIG_NUC_TMR0    Timer0
+    CONFIG_NUC_TMR1    Timer1
     CONFIG_NUC_I2C0    I2C interface
     CONFIG_NUC_SPI0    SPI0 master/slave
     CONFIG_NUC_SPI1    SPI1 master/slave
-    CONFIG_NUC_PWMA    PWM0/1/2/3
+    CONFIG_NUC_PWM0    PWM0
+    CONFIG_NUC_PWM1    PWM1
+    CONFIG_NUC_PWM2    PWM2
+    CONFIG_NUC_PWM3    PWM3
     CONFIG_NUC_UART0   UART0
-    CONFIG_NUC_USBD    USB 2.0 FS device controller registers */
+    CONFIG_NUC_USBD    USB 2.0 FS device controller
     CONFIG_NUC_ACMP    Analog comparator
     CONFIG_NUC_ADC     Analog-digital-converter (ADC)
 
@@ -207,11 +211,15 @@ NuTiny-specific Configuration Options
   ---
 
     CONFIG_NUC_PS2     PS/2 interface
-    CONFIG_NUC_TIMR23  Timer2/Timer3
+    CONFIG_NUC_TIMR2   Timer2
+    CONFIG_NUC_TIMR3   Timer3
     CONFIG_NUC_I2C1    I2C1 interface
     CONFIG_NUC_SPI2    SPI2 master/slave
     CONFIG_NUC_SPI3    SPI3 master/slave
-    CONFIG_NUC_PWMB    PWM4/5/6/7
+    CONFIG_NUC_PWM4    PWM4
+    CONFIG_NUC_PWM5    PWM5
+    CONFIG_NUC_PWM6    PWM6
+    CONFIG_NUC_PWM7    PWM7
     CONFIG_NUC_UART1   UART1
     CONFIG_NUC_UART2   UART2
     CONFIG_NUC_I2S     I2S interface
diff --git a/nuttx/configs/nutiny-nuc120/ostest/defconfig b/nuttx/configs/nutiny-nuc120/ostest/defconfig
index 9141ea1f2..1c068001d 100644
--- a/nuttx/configs/nutiny-nuc120/ostest/defconfig
+++ b/nuttx/configs/nutiny-nuc120/ostest/defconfig
@@ -127,6 +127,42 @@ CONFIG_ARCH_CHIP_NUC120LE3AN=y
 # CONFIG_ARCH_CHIP_NUC120VD2AN is not set
 # CONFIG_ARCH_CHIP_NUC120VD3AN is not set
 # CONFIG_ARCH_CHIP_NUC120VE3AN is not set
+CONFIG_ARCH_FAMILY_NUC120=y
+CONFIG_ARCH_NUC_MEDIUMDENSITY=y
+
+#
+# NUC1XX Peripheral Support
+#
+# CONFIG_NUC_PDMA is not set
+# CONFIG_NUC_FMC is not set
+# CONFIG_NUC_EBI is not set
+# CONFIG_NUC_WDT is not set
+# CONFIG_NUC_RTC is not set
+# CONFIG_NUC_TMR0 is not set
+# CONFIG_NUC_TMR1 is not set
+# CONFIG_NUC_TIMR2 is not set
+# CONFIG_NUC_TIMR3 is not set
+# CONFIG_NUC_I2C0 is not set
+# CONFIG_NUC_I2C1 is not set
+# CONFIG_NUC_SPI0 is not set
+# CONFIG_NUC_SPI1 is not set
+# CONFIG_NUC_SPI2 is not set
+# CONFIG_NUC_SPI3 is not set
+# CONFIG_NUC_PWM0 is not set
+# CONFIG_NUC_PWM1 is not set
+# CONFIG_NUC_PWM2 is not set
+# CONFIG_NUC_PWM3 is not set
+# CONFIG_NUC_PWM4 is not set
+# CONFIG_NUC_PWM5 is not set
+# CONFIG_NUC_PWM6 is not set
+# CONFIG_NUC_PWM7 is not set
+CONFIG_NUC_UART0=y
+# CONFIG_NUC_UART1 is not set
+# CONFIG_NUC_USBD is not set
+# CONFIG_NUC_ACMP is not set
+# CONFIG_NUC_ADC is not set
+# CONFIG_NUC_PS2 is not set
+# CONFIG_NUC_I2S is not set
 
 #
 # External Memory Configuration
@@ -192,9 +228,9 @@ CONFIG_SCHED_HAVE_PARENT=y
 CONFIG_SCHED_CHILD_STATUS=y
 CONFIG_PREALLOC_CHILDSTATUS=0
 # CONFIG_JULIAN_TIME is not set
-CONFIG_START_YEAR=2009
-CONFIG_START_MONTH=9
-CONFIG_START_DAY=21
+CONFIG_START_YEAR=2013
+CONFIG_START_MONTH=2
+CONFIG_START_DAY=22
 CONFIG_DEV_CONSOLE=y
 # CONFIG_MUTEX_TYPES is not set
 # CONFIG_PRIORITY_INHERITANCE is not set
@@ -275,6 +311,20 @@ CONFIG_DEV_NULL=y
 CONFIG_SERIAL=y
 CONFIG_DEV_LOWCONSOLE=y
 # CONFIG_16550_UART is not set
+CONFIG_ARCH_HAVE_UART0=y
+CONFIG_MCU_SERIAL=y
+CONFIG_UART0_SERIAL_CONSOLE=y
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# UART0 Configuration
+#
+CONFIG_UART0_RXBUFSIZE=256
+CONFIG_UART0_TXBUFSIZE=256
+CONFIG_UART0_BAUD=115200
+CONFIG_UART0_BITS=8
+CONFIG_UART0_PARITY=0
+CONFIG_UART0_2STOP=0
 # CONFIG_USBDEV is not set
 # CONFIG_USBHOST is not set
 # CONFIG_WIRELESS is not set
@@ -317,7 +367,7 @@ CONFIG_DISABLE_MOUNTPOINT=y
 #
 # Memory Management
 #
-# CONFIG_MM_SMALL is not set
+CONFIG_MM_SMALL=y
 CONFIG_MM_REGIONS=1
 # CONFIG_GRAN is not set