diff options
author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-11-12 17:44:52 +0000 |
---|---|---|
committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-11-12 17:44:52 +0000 |
commit | 513face0b8237a7b711f0d18ad29a559db87ef9f (patch) | |
tree | 257d172544c49d38e98fc6ceb5e96df85015bf9c /nuttx | |
parent | 510867173c420005cbf0d185466bba6d1242744f (diff) | |
download | px4-nuttx-513face0b8237a7b711f0d18ad29a559db87ef9f.tar.gz px4-nuttx-513face0b8237a7b711f0d18ad29a559db87ef9f.tar.bz2 px4-nuttx-513face0b8237a7b711f0d18ad29a559db87ef9f.zip |
Add SDIO GPIO initialization
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2250 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx')
-rwxr-xr-x | nuttx/arch/arm/src/stm32/stm32_internal.h | 13 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_sdio.c | 25 |
2 files changed, 38 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_internal.h b/nuttx/arch/arm/src/stm32/stm32_internal.h index 2a464c0bf..0357aa562 100755 --- a/nuttx/arch/arm/src/stm32/stm32_internal.h +++ b/nuttx/arch/arm/src/stm32/stm32_internal.h @@ -456,6 +456,19 @@ #define GPIO_CFIDE_NCE41 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTG|GPIO_PIN10) #define GPIO_CFIDE_NCE42 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTG|GPIO_PIN11) +/* SDIO */ + +#define GPIO_SDIO_D0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8) +#define GPIO_SDIO_D1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9) +#define GPIO_SDIO_D2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10) +#define GPIO_SDIO_D3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN11) +#define GPIO_SDIO_D4 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8) +#define GPIO_SDIO_D5 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9) +#define GPIO_SDIO_D6 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN6) +#define GPIO_SDIO_D7 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN7) +#define GPIO_SDIO_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12) +#define GPIO_SDIO_CMD (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN2) + /* FSMC: NOR/PSRAM/SRAM (NPS) */ #define GPIO_NPS_A0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTF|GPIO_PIN0) diff --git a/nuttx/arch/arm/src/stm32/stm32_sdio.c b/nuttx/arch/arm/src/stm32/stm32_sdio.c index 7695b4cdb..26aeb0e48 100644 --- a/nuttx/arch/arm/src/stm32/stm32_sdio.c +++ b/nuttx/arch/arm/src/stm32/stm32_sdio.c @@ -51,10 +51,19 @@ #include "stm32_internal.h"
#include "stm32_sdio.h"
+#if CONFIG_STM32_SDIO
+
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
+/* Configuration ************************************************************/
+
+#if defined(CONFIG_SDIO_DMA) && !defined(CONFIG_STM32_DMA2)
+# warning "CONFIG_SDIO_DMA support requires CONFIG_STM32_DMA2"
+# undef CONFIG_SDIO_DMA
+#endif
+
/* Friendly CLKCR bit re-definitions ****************************************/
#define SDIO_CLKCR_RISINGEDGE (0)
@@ -1049,6 +1058,22 @@ static void stm32_default(void) int mmcsd_slotinitialize(int minor, int slotno, FAR struct sdio_dev_s *dev)
{
+ /* Configure GPIOs for 4-bit, wide-bus operation (the chip is capable of
+ * 8-bit wide bus operation but D4-D7 are not configured).
+ */
+
+ stm32_configgpio(GPIO_SDIO_D0);
+ stm32_configgpio(GPIO_SDIO_D1);
+ stm32_configgpio(GPIO_SDIO_D2);
+ stm32_configgpio(GPIO_SDIO_D3);
+ stm32_configgpio(GPIO_SDIO_CK);
+ stm32_configgpio(GPIO_SDIO_CMD);
+
+ /* Put SDIO registers in their default, reset state */
+
+ stm32_default();
+
return -ENOSYS;
}
+#endif /* CONFIG_STM32_SDIO */
\ No newline at end of file |